Matsushita Electric Industrial Co., Ltd.

Panasonic Corporation

Masayuki Ozasa

Shiro Dosho

Akio Yokoyama

Hidehiko Kurimoto

Tatsuo Okamoto

Naoshi Yanagisawa

Manabu Ohkubo

Hiroyasu Shimaoka

Kazuhiko Nagaoka

Takao Soramoto

Fumihito Inakai

Manabu Ookubo

A reference voltage generating circuit includes: a reference voltage generating circuit element including a first diode characteristic element and a second diode characteristic element, a density of a current flowing through the second diode characteristic element being different from a density of a current flowing through the first diode characteristic element, the reference voltage generating circuit element being configured to output a reference voltage generated based on a difference between voltages respectively applied to the first diode characteristic element and the second diode characteristic element; a first adjusting circuit element configured to adjust a first-order temperature coefficient of the reference voltage; and a second adjusting circuit element configured to adjust a second-order temperature coefficient of the reference voltage.

Reference voltage generating circuit and reference voltage source

Four input nodes I-Ifor inputting 4-phase signals, four resistors R-R, four capacitors C-C, and four output nodes O-Ofor outputting 4-phase signals are provided. The resistors and the capacitors are connected alternately in a loop, and the input nodes and output nodes are connected alternately to the respective nodes between the resistors and the capacitors sequentially. Each of the four resistors is composed of a group of three or more partial resistors, and three groups of the partial resistors R-R, R-Rand R-Rare collected respectively and arranged in the same attitude, while the partial resistors R-Rof the remaining group are distributed into the other groups and arranged in the same line the same attitude as the partial resistors of each of the other groups. The regions of the thus collected groups are arranged in one direction. By simplifying the layout of the components and the shape of the wirings, influences on the characteristics by the parasitic elements are reduced, and complication in the layout and wirings can be suppressed even when using plural stages.

Passive polyphase filter

A current source apparatus includes a first MOS transistor having a drain serving as current input terminals with the gate connected to the drain, a first switch connected to the source of the first MOS transistor, a second MOS transistor having a drain serving as a current output terminal, a second switch connected to the source of the second MOS transistor, a third switch having one end connected to the gate of the first MOS transistor, and the other end connected to the gate of the second MOS transistor, and a drive circuit which controls the second switch and the third switch.

Current source apparatus, light-emitting-device apparatus and digital-analog converting apparatus

In a differential amplifier and an operational amplifier each for amplifying a signal, a differential signal composed of first and second signals is inputted to a couple of input terminals (). When the voltage of the first signal is, e.g., less than the voltage value of a reference voltage source (), a comparator () senses it and a switch circuit () switches to a first current source () and a current from a third current source () flows into the first current source () so that a current is inhibited from flowing in the first differential couple (). As a result, the inputted differential signal is amplified and outputted only through a second differential couple (). In a situation in which the voltage of the first signal exceeds the voltage of the reference voltage source (), on the other hand, the switch circuit () switches to a current source () so that the inputted differential signal is amplified and outputted only through the first differential couple (). As a result, a gain is equal over the entire range of input operating voltage and a high-speed operation is performed.

Differential amplifier and operational amplifier

Differential amplifier and calculation amplifier

A first current mirror circuit that operates at the time of a rise in a first signal is connected to a current source, a second current mirror circuit that operates at the time of a rise in the first signal is connected to the first current mirror circuit, and a third current mirror circuit that operates at the time of a rise in a second signal is respectively connected to the current source and the point of connection between the first current mirror circuit and the second current mirror circuit. A pulse generation circuit for generating first and second signals from an external signal is provided. The second signal rises in sync with the first signal, and falls before the first signal.

Current drive circuit, light emitting element drive circuit and digital-analog converter

There is provided a current source circuit in which a outflow current of an output terminal is equal to an inflow current thereof. The current source circuit includes a first transistor group converting a reference current from a reference current source into a voltage and a first transistor having a current mirror relationship with the first transistor group, and allowing an output current to flow therethrough. An error amplifier compares a voltage generated in the first transistor group and supplied to one input terminal with a voltage supplied to the other input terminal. A second transistor is driven with an output voltage of the error amplifier. A third transistor is driven with the output voltage of the error amplifier, and allows an output current to flow therethrough in a direction opposite to the output current of the first transistor with respect to an output terminal. A second transistor group converts a current flowing through the second transistor into a voltage to supply the voltage to the other input terminal of the error amplifier.

Current source circuit and amplifier using the same

Fixed pattern noise of an analog memory is reduced. Transfer paths of an address selection signal (SL) between an address generation unit ( ) and respective storage elements ( ) for storing an analog signal are constructed to have a substantially uniform electric characteristic in driving the storage elements ( ) by the address selection signal (SL) to such an extent that the output signal of the analog memory is free from fixed pattern noise. A buffer unit ( ) for temporarily storing and outputting the address selection signal is provided between the address generation unit ( ) and the respective storage elements ( ), and the buffer unit ( ) is constructed to have an output characteristic substantially uniform between the storage elements ( ). Also, lines between the buffer unit ( ) and the storage elements ( ) are constructed to have substantially the same electric characteristic. In this manner, charge feed through noise of the respective storage elements ( ) are made substantially uniform, resulting in suppressing the fixed pattern noise.

Analog memory and image processing system for reducing fixed pattern noise

A composite MOS transistor device for a semiconductor integrated circuit includes at least a pair of MOS transistors, or first and second MOS transistors, placed on the same board. The first and second MOS transistors are made up of first and second groups of equally divided transistors with an equal gate width, respectively. These divided transistors are arranged in parallel to each other in the gate longitudinal direction. The divided transistors of these groups are arranged such that the sum of coordinates of respective gates, measured from a centerline, is equalized between these groups along the gate longitudinal direction. Since the sum of errors of respective gates along the length thereof becomes zero in each group of divided transistors, the current difference between the two MOS transistors can be eliminated. Accordingly, in forming a differential amplifier or a current mirror circuit using this MOS transistor pair, high current gain can be obtained while maintaining an adequate balance in output current.

Composite MOS transistor device

A comb filter easily implementable as a monolithic LSI without using a large-capacitance capacitor is provided. A comb-like frequency characteristic is realized by two delay circuits for delaying a signal for mutually different amounts of time and an operation circuit for deriving a sum or difference of the outputs thereof. An input select switch selectively outputs, instead of an image signal, a test signal, which is a DC signal having a predetermined amplitude, during a blanking interval of the image signal. A detector controls the gain of a variable-gain amplifier, provided for the output of either one of the delay circuits, in accordance with a difference between the output signal of the comb filter in response to the test signal and a predetermined reference signal. That is to say, the gain of the comb filter is controlled by using a stable test signal as a control signal, instead of a burst signal contained in an unstable image signal. Accordingly, a large-capacitance capacitor, which has been required for stabilizing the control signal, is no longer necessary.

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Kyoto, Japan

Masayuki Ozasa