Lapis Semiconductor Co., Ltd.

Oki Electric Industry Co., Ltd.

Lapis Technology Co., Ltd.

Masayuki Otsuka

Teruhiro Harada

A semiconductor integrated circuit is capable of electrically connecting to a capacitance variable capacitor whose electrostatic capacitance changes corresponding to an environmental change between a first and a second capacitances and determines whether the electrostatic capacitance of the capacitance variable capacitor has changed to exceed a reference capacitance value. The semiconductor integrated circuit includes a reference capacitor having a fixed electrostatic capacitance between the first capacitance and the second capacitance as the reference capacitance value; and an amplifier circuit, charging the capacitance variable capacitor via a first node and charging the reference capacitor via a second node corresponding to a clock signal, amplifying a potential difference between a potential of the first node and a potential of the second node, and outputting a binary determination signal indicating whether the electrostatic capacitance of the capacitance variable capacitor has changed to exceed the reference capacitance value based on the amplified potential difference.

Semiconductor integrated circuit

A semiconductor device includes first and second electrode pads for externally connecting two electrodes of a sensor capacitor that has a capacitance that changes according to an environmental change. The semiconductor device further includes a capacitor having a pair of electrodes, one of the pair of electrodes being connected to the first electrode pad, a capacitance circuit having a reference capacitance, and a determination circuit that includes first and second relay terminals. The determination circuit is configured to send a charging current from the first relay terminal to the other electrode of the capacitor and send a charging current from the second relay terminal to the capacitance circuit, and determine whether or not the size of a potential of the first relay terminal is greater than the size of a potential of the second relay terminal, thereby determining whether a capacitance of the sensor capacitor has changed or not.

Semiconductor device and capacitance sensor device

A semiconductor device comprises a control unit, a semiconductor memory, a reference capacitance unit, a determination capacitance unit, a calibration circuit configured to supply a selection signal to the reference capacitance unit to selectively connect capacitors to differing potentials, and a determination circuit configured to charge a capacitance of the reference capacitance unit, to charge a capacitance of the determination capacitance unit, and to attain a comparison result by comparing the differing potentials. The control unit is configured to control rewriting of the semiconductor memory on the basis of a determination result of the determination circuit.

Semiconductor device and capacitance sensor circuit

A capacitance sensor circuit is provided, including: a capacitance variable capacitor changing from a first capacitance to a second capacitance corresponding to environmental change; a reference capacitor; and an amplifier circuit charging the capacitance variable capacitor via a first node and the reference capacitor via a second node, and outputting a determination signal. In the amplifier circuit, a differential amplification part generates a potential difference signal obtained by amplifying the potential difference between the first and the second nodes; an output part outputs the determination signal based on the potential difference signal; and when the difference between the increase degrees of the potentials of the first and the second nodes is less than a predetermined value, the output part holds and outputs the determination signal immediately before that state and a bias control part stops a current flowing through the differential amplification part.

Capacitance sensor circuit and semiconductor integrated circuit

A semiconductor device including: a semiconductor substrate; at least one circuit block provided on a main surface of the semiconductor substrate and having a predetermined function; a wiring layer including plural metal layers that connect the circuit block; and plural capacitors including a first capacitor connected to the circuit block and that uses the plurality of metal layers, and a second capacitor that uses an active area disposed within the main surface of the semiconductor substrate, wherein at least one of the first capacitor and at least one of the second capacitor are stacked in a stacking direction of layers of the semiconductor.

Semiconductor device including boosting circuit with plural pump circuits

Provided is a sense amplifier circuit for detecting data having been read from a memory cell. The sense amplifier circuit includes: a potential control unit for controlling the potential of a bit line connected to a memory cell; a current amplifier unit for amplifying a readout current flowing from the memory cell to the bit line so as to produce an amplified current; and a detection unit for detecting data having been read from the memory cell on the basis of the amplified current. The potential control unit controls the potential of the bit line in a data readout duration, and the data readout duration includes a current amplification duration, and the current amplifier unit amplifies the readout current in the current amplification duration.

Sense amplifier for detecting data read from memory cell

There is provided a non-volatile memory circuit including: plural storage element sections each including a zener zap device and a switch section that connects an anode of the zener zap device to an output terminal during data reading; and wherein cathodes of respective zener zap devices of the plural storage element sections are commonly connected so as to be connected to a power supply employed in the writing or to a power supply employed in the reading, wherein the output terminals of the plural storage element sections are commonly connected to an input terminal of a detector, an anode of each of the storage element sections being connected to a ground voltage during data writing, and wherein the switch section is switched ON during data reading so as to connect the anode of the storage element section through the output terminal to the input terminal of the detector.

Non-volatile memory, semiconductor device and reading method

A voltage regulator includes: a drive voltage generating part for generating a drive voltage and then apply the drive voltage to a drive line; an output transistor for outputting a voltage corresponding to a voltage value of the drive line as the internal source voltage; and a compulsory drive circuit including a capacitor element configured to receive the source voltage at one end, a first switching element for receiving a ground voltage and applying the ground voltage to the other end of the capacitor element by being set in an ON state over a period in which the selected operational mode is the standby mode, and a second switching element that connects the other end of the capacitor element to the drive line only for a predetermined period in an ON state when the operational mode transitions from the standby mode to the active mode.

Voltage regulator, semiconductor device, and voltage generation method for voltage regulator

There is provided a non-volatile memory including: plural zener zap devices, each including a cathode region and an anode region formed in a well; and a metal wiring line that is formed above the plural zener zap devices, that is commonly connected to each of the cathode regions, and that supplies a write voltage to each of the zener zap devices.

Non-volatile memory and semiconductor device

A test voltage having a first voltage or a second voltage is applied to an output terminal of a complementary fuse that includes a first fuse to one end of which the first voltage is applied and the other end of which serves as the output terminal and a second fuse to one end of which the second voltage is applied and the other end of which is connected to the output terminal. The test voltage then stops being applied. In such a state, whether output data from the output terminal of the complementary fuse coincides with an expected value is determined. The result of determination is output as a test result.

Semiconductor device and test method

A semiconductor storage device has a great number of logic circuits and fuse blocks with its space-saving design. In the semiconductor storage device, a plurality of fuse blocks is arranged in a line or row in the vicinity of a gate array. Each fuse block includes a plurality of fuse pieces arranged in a juxtaposed manner and exposed to the exterior through a fuse window. A power-supply wire and a ground wire extend along the juxtaposed direction of the fuse pieces. Spacing in the vicinity of the gate array is used for arrangement of the fuse blocks.

Semiconductor storage device with wiring that conserves space

An internal step-down power supply circuit has an internal step-down power-supply output node, a driver, a divider circuit and a current mirror circuit. The internal node provides an internal step-down power supply potential. The driver adjusts an external power-supply potential and provides an adjusted external power-supply potential to the internal node. The divider circuit divides a voltage that appears on the internal node and provides a divided voltage. The current mirror circuit is connected to the divider circuit. The current mirror circuit compares the voltage provided by the divider circuit and a reference voltage. The current mirror circuit sets the conductance of a first transistor feeding a current in response to the reference voltage to n times of the conductance of a second transistor feeding a current in response to the voltage provided from the divider circuit, wherein n is greater than 1.

Growing community of inventors

Yokohama, Japan

Masayuki Otsuka