Adv Antest Corporation

Masayuki Kurihara

Akira Goishi

Hironobu Niijima

Hiroshi Kawamoto

Koshi Ueda

The object of the invention is to provide an IC analysis system having a charged particle beam apparatus in which the operability and picture quality have been enhanced and the measurement method of a device under test. In the IC analysis system, stop signal generating means in which the stop signal stimulates the acquisition of image data is added to a test pattern generator and acquisition completion signal generating means which releases the stopping state on completing the acquisition of image data and which resumes the test pattern updating operation is added to the charged particle beam apparatus. Furthermore, by adding mode select means to the charged particle beam apparatus, a clearer potential contrast image can be obtained. The methods for locating fault positions can be realized in the IC analysis system having the charged particle beam apparatus wherein the image data can be obtained by alternate test patterns, or by adding one image data to the reverse potential of another image data, or by scanning and irradiating the charged particle beam onto the same surface of the device at a plurality of times.

IC analysis system having charged particle beam apparatus for improved

An IC fault analysis system which is capable of accurately correlating mask layout data and/or net listing data associated with CAD (computer aided design) data developed in the IC design and an image obtained by a non-contact type tester such as an electron beam tester. The IC fault analysis system includes a circuit diagram display for showing a circuit diagram of the IC device under test based on the CAD data, a mask layout display for showing a mask layout of the IC device under test based on the CAD data, a contrast image display for showing a potential distribution of the IC device under test obtained in the non-contact type tester, an input means connected to the circuit diagram display for specifying a circuit component of the IC device under test, a comparison means for comparing the circuit diagram of the circuit component defined by the input means and contrast image corresponding to the circuit component, and a comparison data memory for storing the comparison data of the comparison means and providing the comparison data to the contrast image display.

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Gyoda, Japan

Masayuki Kurihara