Sony Corporation

Sony Semiconductor Solutions Corporation

Tokyo Shibaura Electric Co., Ltd.

Tokyo Shibaura Denki Kabushiki Kaisha

Nisshin Engineering Inc.

Tamagawa Seiki Co., Ltd.

Masayuki Katakura

Kenzo Akagiri

Motomi Ookouchi

Masahiro Ichihashi

Kazumasa Nishimura

Masashi Takeda

Nobuhiko Shigyo

Hisashi Yamada

Kenya Kondou

Toshio Suzuki

Norio Shoji

Yuichi Takagi

Motoyasu Yano

Tetsuya Tashiro

Syou Mitsuishi

Yoshinori Tanaka

Tsutomu Harada

Takanori Saeki

Michiru Senda

Katsuyuki Tanaka

Masaaki Ishihara

Kenichi Maruko

Katsuhisa Daio

Hiroshi Kushihara

Hiromitsu Suzuki

Junkichi Sugita

Kouzi Tsukamoto

Kazuji Sasaki

Kimimasa Senba

Yuichiro Minami

Ikuro Hata

Kazuyuki Saijo

Masato Sekine

Hideshi Motoyama

Tatsuya Shirakawa

Daisuke Arima

Boyang Hao

Genichiro Ohga

Takumi Tenma

Takahiro Goto

Asako Toda

To improve stability of a reference current in a current source circuit that generates the reference current by using capacitors. The current source circuit includes a pair of capacitors, a switching circuit, an operational amplifier, and an output transistor. The switching circuit charges one of the pair of capacitors with a predetermined charging current, and transfers electric charge from the one of the pair of capacitors to the other of the pair of capacitors. The operational amplifier amplifies a difference between the terminal voltage of the other of the pair of capacitors and a predetermined reference voltage and outputs the difference that has been amplified as an output voltage. The output transistor outputs a current corresponding to the output voltage as a reference current.

Current source circuit and electronic device

Provided is an amplifier that includes a first transistor including a gate terminal to which an applied input signal is input, where a current depending on the applied input signal flows through the first transistor. A gate terminal of a second transistor is connected to a load section, and a current depending on a change in a voltage of the drain terminal of the first transistor flows through the second transistor. A source terminal of the first transistor and a drain terminal of the second transistor are connected in common to a first resistance, and the current from the first transistor and the current from the second transistor flow through the first resistance. A third transistor supplies a current approximately equal to the current of the second transistor. The current supplied by the third transistor is output from an output end.

Amplifier

A charge pump circuit by which fundamental issues involved in the voltage feedback type charge pump circuit have been solved is realized. A power supply circuit includes a charge pump circuit, a feedback circuit feeding an output of the charge pump circuit back to an input of the charge pump circuit, a first current source causing a constant current to flow through the feedback circuit, a MOS transistor element interposed in a middle of the feedback circuit, a resistor element interposed at a position closer to the output of the charge pump circuit than the MOS transistor element in the feedback circuit, a bias circuit applying a constant voltage to a control terminal of the MOS transistor element, and a control section controlling a value of the constant current which the first current source flows through the feedback circuit.

Power supply circuit comprising a charge pump circuit and a feedback circuit for the charge pump circuit

A semiconductor circuit apparatus of the present disclosure includes a control circuit controlling a clock signal externally input, a drive circuit performing a switching operation according to a pulse signal provided by the control circuit, a series connection circuit including an inductor element, a switch element, and a capacitive element connected in series between a signal line and a fixed potential node, the series connection circuit forming an LC resonance circuit, and a level detection circuit having an input end connected to the signal line. An output from the level detection circuit is fed back to the control circuit.

Semiconductor circuit apparatus and system equipped with semiconductor circuit apparatus

An object of the present technology is to stably operate a power supply circuit. A charge switch is connected to a first terminal of a capacitor and charges the capacitor with an input voltage on the basis of a control signal inputted to a control terminal. A discharge switch is complementary with the charge switch, is connected to the first terminal of the capacitor, and discharges on the basis of the control signal inputted to the control terminal the voltage charged to the capacitor, thereby generating an output voltage. A charge control signal converting section converts a charge control signal that controls the charge into a control signal referenced to the input voltage and inputs the resulting control signal to the control terminal of the charge switch. A discharge control signal converting section converts a discharge control signal that controls the discharge into a control signal referenced to the output voltage and inputs the resulting control signal to the control terminal of the discharge switch. A pulse voltage supplying section supplies a pulse voltage to a second terminal. A control signal generating section exclusively generates the charge control signal and the discharge control signal and supplies the charge control signal and the discharge control signal.

Power supply circuit and power supply apparatus

Disclosed herein is a receiver including: a first mixer adapted to mix satellite signals from first and second satellites and a first local oscillation signal so as to convert a carrier frequency of the satellite signals into a lower first intermediate frequency; a second mixer adapted to mix a satellite signal of the second satellite frequency-converted by the first mixer and a second local oscillation signal so as to convert the first intermediate frequency of the frequency-converted satellite signal from the second satellite into an even lower second intermediate frequency; and a first frequency divider adapted to generate the second local oscillation signal by dividing a frequency of the first local oscillation signal.

Receiver

A rotary agitation type heat treatment apparatus includes: a cylindrical member for performing heat treatment on a material to be treated supplied inside the cylindrical member from one end thereof; a rotating unit for rotating the cylindrical member; a heating unit for heating the material supplied inside the cylindrical member; and agitation members arranged in the cylindrical member. Each agitation member has a shaft structure and two or more blades provided on the shaft structure. The cylindrical member and the agitation members are constituted of a ceramic material. The material inside the cylindrical member is heated and the cylindrical member is rotated, so that the material is heat treated while agitated by the agitation members in the cylindrical member, and discharged out from the other end thereof.

Rotary agitation type heat treatment apparatus

An image pickup unit includes: a signal generating section generating a pulse signal that makes transitions between a first voltage and a low-noise second voltage; a voltage holding section holding a difference between a voltage of the pulse signal and a voltage of an output node; a voltage setting section that generates a pixel selection signal through setting the voltage of the output node to a third voltage in correspondence to a transition of the pulse signal from the second voltage to the first voltage, and outputs the pixel selection signal from the output node; and an image pickup section driven by the pixel selection signal.

Image pickup unit, method of driving image pickup unit, and image pickup display system

There is provided a differential ring oscillation circuit including a differential ring oscillation unit in which delay circuits, to which signals of 2 phases are input, and which delay and output the input signals of 2 phases, are connected at even stages in a ring form, first and second common-mode level detection units that detect that the input signals of 2 phases of one delay circuit at an even stage of the differential ring oscillation unit and the input signals of 2 phases of one delay circuit at an odd stage of the differential ring oscillation unit are at same predetermined levels, respectively, and first and second switches that set, to specific potentials, one of the output signals of 2 phases of the delay circuit delaying the input signals of 2 phases, when the first and second common-mode level detection units detect the same predetermined levels, respectively.

Differential ring oscillation circuit, device, and oscillation control method

A sine wave multiplication circuit multiplies an analog input signal by n (n is an integer equal to or greater than 2) weighting coefficients each having a unique value. The polarity of the analog input signal multiplied by one of the n weighting coefficients is changed over. Further, changeover among the n weighting coefficients and of the polarity is performed after every sampling period equal to &#xbd;k (k is an integer, and 2k is equal to or greater than 6 but equal to or smaller than 4n) of one period of the sine wave signal by which the analog input signal is multiplied. As a result, a staircase waveform having 2n positive and negative stairs is generated while unnecessary harmonic wave components in the proximity of the sine wave signal by which the analog input signal is multiplied can be reduced.

Sine wave multiplication circuit and sine wave multiplication method

A phase-locked circuit comprises a complex signal processor and a feedback portion wherein the complex signal processor: receives as an input a first complex signal composed of a real part component and an imaginary part component; generates a second complex signal composed of a first signal component and a second signal component and having a second frequency in accordance with a feedback control signal input from the feedback portion; and generates a signal in accordance with a declination of a third complex signal obtained by multiplying the first complex signal with the second complex signal and outputs to the feedback portion. The feedback portion generates the feedback control signal in accordance with a signal input from the complex signal processor, so that the declination converges to a constant value; and the complex signal processor synchronizes a phase of the second complex signal with the first complex signal and outputs.

Phase-locked circuit

A resolver use angle detection IC subjected to a phase lock operation so as to follow not an angle &#x3b8;(t) for detection, but a phase angle &#x3c9;ot&#xb1;&#x3b8;(t) having an offset of a frequency &#x3c9;ot in the phase lock units. For this reason, when the excitation frequency &#x3c9;ot is set sufficiently high with respect to the frequency of the angle &#x3b8;(t), the phase angle &#x3c9;ot&#xb1;&#x3b8; to be followed in the phase lock units will not become zero. For this reason, an angle having a high precision can be found in real time regardless of the configuration not including the conventional apparatus in which the configuration is complex and the power consumption is large like a bipolar VCO and an up/down type counter.

Angle detection apparatus computing phase differences between first and second phase angles

A sine wave generation circuit for generating a high precision pseudo sine wave without increasing the circuit size including a pulse generation circuit for generating a plurality of pulse signals using an input clock signal as reference and a voltage output circuit for stepwisely changing the voltage level of the output on the basis of a plurality of pulse signals. The voltage output circuit generates a plurality of different coefficients in response to a combination of bit information in a plurality of pulse signals and changes the output of the voltage output circuit in response to a coefficient series obtained when further combining the plurality of generated coefficients, and odd number generation circuits each generating odd number values of ternary-values or more having positive side coefficients and negative side coefficients symmetric about a center coefficient are provided in a plurality of coefficient generation circuits provided in the voltage output circuit.

Sine wave generation circuit

A bias circuit according to the present invention includes a monitoring circuit having a second FET and a resistance connected to a drain of the second FET for monitoring a drain current of a first FET to be supplied with a gate bias; a differential circuit including a third FET having a gate supplied with a reference voltage, a fourth FET having a gate connected to the drain of the second FET, sources of the third FET and the fourth FET being connected to a common point, and resistances connected to drains of the third FET and the fourth FET, respectively; and a fifth FET having a drain connected to the common source of the third FET and the fourth FET; wherein a drain voltage of the third FET is fed back to gates of the first FET and the second FET, and a drain voltage of the fourth FET is fed back to a gate of the fifth FET.

Bias circuit and radio communication apparatus using same

A nonlinearity compensation circuit is disclosed which includes an inverse hyperbolic function generation circuit for converting differential currents corresponding to input signals in&plus; and in&minus; into differential voltages which increase in proportion to an inverse hyperbolic function, an offset provision circuit for providing an offset corresponding to control signals c&plus; and c&minus; to the differential voltages outputted from the inverse hyperbolic function generation circuit and a hyperbolic function generation circuit for converting the differential voltages to which the offset has been provided by the offset provision circuit into signals which increase in proportion to a hyperbolic function and outputting the resulting signals as output signals out&plus; and out&minus;. Consequently, compensation for the nonlinearity such as second order distortion can be performed for the read signal from a recording medium.

Nonlinearity compensation circuit and method, control circuit and method for nonlinearity compenstation circuit and recording and/or playback apparatus employing the same

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Kanagawa, Japan

Masayuki Katakura