Hitachi Cable, Inc.

Masayuki Hosono

Yasuharu Kameyama

Akiji Shibata

Norio Okabe

Kimio Inaba

Kazumoto Komiya

Tadashi Kawanobe

A multilayer semiconductor device has plural semiconductor devices, each having a circuit board for a ball grid array and a semiconductor chip provided on the board. The semiconductor boards are bonded together by a reflow mounting process to use a solder ball for interlayer connection so as to form a multilayer structure. The plural semiconductor devices each have a projection for restricting inclination of the circuit board, and the projection is provided between neighboring two of the circuit boards.

Multilayer semiconductor device

In a semiconductor device comprising: a wiring board comprising a conductor wiring having a predetermined pattern provided on the surface of an insulating substrate; an elastomer provided on the wiring board; a semiconductor chip bonded onto the wiring board through the elastomer; and an insulator for sealing the periphery of the semiconductor chip and the elastomer, the semiconductor chip in its external terminal being electrically connected to the conductor wiring, a part of the elastomer is exposed onto the surface of the insulator. By virtue of the above construction, a lowering in device reliability can be prevented.

Semiconductor device and process for producing the same

A semiconductor chip is mounted on a tape carrier by interposing an elastmer layer therebetween, so that thermal stress caused by a difference of thermal expansion coefficients of the semiconductor chip and the tape carrier is relieved. The tape carrier is structured by an insulating film and a plurality of leads formed on the insulating film. The insulating film has an opening for bonding the plurality of leads to the electrodes of the semiconductor chip, and the elastmer layer comprises first and second elastmer layers provided on the opposite sides of the opening to be separated around at least one end of the opening. The opening may be divided into a plurality of openings, in each of which a corresponding one or some of connected portions of the plurality of leads and the electrodes of the semiconductor chip are positioned, and sealing resins are filled in the plurality of openings to seal the connected portions.

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Toyoshima-ku, Japan

Masayuki Hosono