Kabushiki Kaisha Toshiba

Masayuki Dojo

Akira Kubo

Takaaki Kamimura

Masahiko Machida

Kiyotsugu Mizouchi

Shigeyuki Motokawa

Tomoki Miyaji

An object of the present invention is to simplify steps for manufacturing a matrix array substrate by reducing the number of masks being necessary to manufacture and to improve yield ratio of the matrix array substrate. According to the present invention, on a glass substrate, scanning lines, signal lines, a first insulated film, a second insulated film, an unprocessed semiconductor film, an unprocessed channel protective film, unprocessed low resistance semiconductor film, and Mo/Al/Mo laminated film are formed. Then, the source electrodes, the drain electrodes, the signal lines, a semiconductor film, and a low resistance semiconductor film are formed at a time by patterning using a common mask pattern. Display pixel electrodes cover upper surfaces of the source electrodes, the drain electrodes, the semiconductor film, the scanning line pads, and the signal line pads. Edge lines of the source electrodes, the low resistance semiconductor film, and the semiconductor film are aligned, and edge lines of the drain electrodes, the low resistance semiconductor film and the semiconductor film are aligned.

Liquid crystal display device, matrix array substrate, and method for manufacturing matrix array substrate

In the manufacturing method of array substrates for use in flat panel display devices including liquid crystal display (LCD) devices, it is aimed to prevent failure of interlayer dielectric film due to wiring deformation or the like while reducing the resistivity of wiring. It is also aimed to prevent corrosion of a metal wiring layer at the etching process and to thereby prevent deterioration of production yield due to corrosion. According to the method of the invention, to form scanning lines ( ), an aluminum-neodymium alloy (Al-Nd) film ( ) is deposited in 300 nm thickness on the first hand, and then 50 nm thick Mo film ( ) is deposited thereon. Subsequently, gate insulator films ( and ) are formed by CVD processes at a substrate temperature of 350&deg; C. Further, an etching process for forming pixel electrode ( ) is carried out by HBr, HI, Oxalic acid or a mixture liquid containing at least one of these acids.

Method of manufacturing array substrate

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Himeji, Japan

Masayuki Dojo