Seiko Epson Corporation

Masayoshi Todorokihara

Takayuki Kondo

Kenta Sato

Eiju Hirai

Teruo Takizawa

Yuko Komatsu

Aritsugu Yajima

Tetsuro Matsumoto

Kazuyuki Miyashita

Takeo Kawase

Junichi Karasawa

Sumio Utsunomiya

Hiroyuki Hara

Takashi Masuda

Daisuke Abe

Yoshihiko Nimura

A vibration rectification error correction device includes a reference signal generation circuit that outputs a reference signal, a first frequency delta-sigma modulation circuit that performs frequency delta-sigma modulation on the reference signal by using a first measured signal to generate a first frequency delta-sigma modulated signal, a first filter, a second filter that operates in synchronization with the reference signal, and a first timing control circuit that controls a timing of outputting an input signal in synchronization with the first timing signal, in which the first filter and the first timing control circuit are provided on a signal path from an output of the first frequency delta-sigma modulation circuit to an input of the second filter.

Vibration rectification error correction device, sensor module, and vibration rectification error correction method

A transition-state output device includes: a ring oscillator circuit; a state machine changing in state according to a change in state of the ring oscillator circuit; a transition-state acquisition section acquiring and holding state information including a signal output from the ring oscillator circuit and a signal output from the state machine, synchronously with a reference signal; and an internal-state calculation section calculating an internal state corresponding to a number of changes in state of the ring oscillator circuit, based on the state information held by the transition-state acquisition section. A time until the internal state, after transitioning from a first internal state to a second internal state, transitions to the first internal state again is longer than a time interval of updating the state information held by the transition-state acquisition section.

Transition-state output device, time-to-digital converter, and analog-to-digital converter circuit

A vibration rectification error correction device includes a reference signal generation circuit configured to output a reference signal, a frequency delta-sigma modulation circuit configured to perform a frequency delta-sigma modulation on the reference signal using a measurement target signal to generate a frequency delta-sigma modulation signal, a first filter which is disposed in a posterior stage of the frequency delta-sigma modulation circuit, and operates in sync with the measurement target signal, and a second filter which is disposed in a posterior stage of the first filter, and operates in sync with a first frequency signal asynchronous with the reference signal.

A frequency synthesizer includes: a time-to-digital converter configured to output a time-to-digital value corresponding to a time event of a trigger signal with respect to an operating clock signal; a comparison unit configured to compare a value based on the time-to-digital value with a target value; an oscillation unit configured to generate the synthesizer signal; and a frequency adjustment unit configured to adjust a frequency of the synthesizer signal based on a comparison result of the comparison unit. The time-to-digital converter includes: a state transition unit configured to start a state transition in which an internal state transitions based on the time event of the trigger signal and output state information indicating the internal state; a transition state acquisition unit configured to acquire and hold the state information in synchronization with the operating clock signal; and a calculation unit configured to calculate the time-to-digital value according to the number of transition times of the internal state based on the state information acquired by the transition state acquisition unit.

Frequency synthesizer

A signal processing method includes a processing target signal generation step of generating a processing target signal which is a time-series signal based on a source signal which is a time-series signal output from an object, and a vibration rectification error calculation step of calculating a plurality of vibration rectification errors by performing product-sum operation processing of a first signal based on the processing target signal and a second signal based on a phase-shifted signal of the processing target signal a plurality of times by changing a shift amount.

Signal processing method, signal processing device, physical quantity measurement device, and sensor module

A frequency delta-sigma modulation signal output circuit includes: a phase modulation circuit configured to generate n delay signals obtained by delaying a measurement target signal, n being an integer of 2 or more, and generate a phase modulation signal by randomly selecting one of the n delay signals in synchronization with the measurement target signal; and a frequency ratio digital conversion circuit configured to generate a frequency delta-sigma modulation signal using a reference signal and the phase modulation signal.

Frequency delta-sigma modulation signal output circuit and sensor module

A vibration rectification error correction device includes a first filter that operates in synchronization with the measured signal, and a second filter that operates in synchronization with the reference signal, in which the first filter generates a third signal based on a first signal having a first group delay amount and a second signal having a second group delay amount, the second filter receives a signal based on the third signal and outputs a fourth signal, and a first vibration rectification error and a second vibration rectification error have different polarities.

A signal processing method includes: a processing target signal generation step of generating a processing target signal that is a time-series signal, based on a source signal that is a time-series signal corresponding to a physical quantity generated in a steady state of a target object; and a correlated signal generation step of performing correlation filter processing between a template signal that is a time-series signal generated based on the source signal, and the processing target signal, and generating a correlated signal that is a time-series signal.

Signal processing method and signal processing device

A vibration rectification error correction circuit includes a first correction circuit that obtains a digital value based on a signal to be measured output from a sensor element configured to measure a physical quantity and corrects a vibration rectification error of the digital value by a correction function based on a product of values obtained by biasing the digital value.

Vibration rectification error correction circuit, physical quantity sensor module, structure monitoring device, and correction value adjustment method of vibration rectification error correction circuit

A physical quantity sensor module includes: a resonant frequency shift based physical quantity sensor whose frequency adjusts with a adjust in physical quantity; a reference signal oscillator which outputs a reference signal; a frequency delta-sigma modulator which performs frequency delta-sigma modulation of the reference signal, using an operation signal based on a measurement target signal as an output from the resonant frequency shift based physical quantity sensor, and generates a frequency delta-sigma modulated signal; a first low-pass filter provided on an output side of the frequency delta-sigma modulator and operating synchronously with the measurement target signal as the output from the resonant frequency shift based physical quantity sensor; and a second low-pass filter provided on an output side of the first low-pass filter and operating synchronously with the reference signal.

Physical quantity sensor module, clinometer, and structure monitoring device

A delay circuit includes a state transition section configured to start state transition based on a trigger signal and output state information indicating the internal state and a transition-state acquisition section configured to latch and hold the state information. The state transition section includes a tapped delay line in which a plurality of delay elements are coupled, a logical circuit configured to generate a third signal based on a first signal based on the trigger signal and a second signal, which is an output signal of the delay element, and a synchronous transition section configured to count an edge of the third signal. The state information is having an output signal of the synchronous transition section and an output signal of the tapped delay line. A humming distance of the state information before and after the state transition is 1. A time from when the internal state transitions from a first internal state to a second internal state until when the internal state transitions to the first internal state again is longer than an interval of a time for updating the state information held by the transition-state acquisition section.

Delay circuit, time to digital converter, and A/D conversion circuit

An A/D conversion circuit includes a comparison-reference-signal generator section configured to generate a comparison reference signal synchronized with a sampling clock signal, a comparator configured to compare a voltage of an input signal and a voltage of the comparison reference signal to thereby generate a trigger signal, a time to digital converter configured to calculate a first time digital value, and a digital-signal generator section configured to generate, based on the first time digital value and a second time digital value, a digital signal corresponding to the voltage of the input signal. The first time to digital converter includes a state transition section configured to start transition of a state based on the trigger signal and output state information, and a weight operation section configured to, in synchronization with the reference clock signal, perform, on a value based on the state information, weighting corresponding to time elapsing and perform a predetermined arithmetic operation to thereby calculate the first time digital value corresponding to the number of transition times of the state.

A/D conversion circuit

A frequency ratio measurement device includes a counter section configured to count a time event of a first signal and output a count value obtained by multiplying the time event by k, a time to digital converter section configured to output a time digital value corresponding to a phase difference between the first signal and a second signal, a combiner section configured to output a combined value of the count value and the time digital value, a subtractor section configured to output a difference value between a first value based on the combined value and a second value, a quantizer section configured to compare a third value based on the difference value with a predetermined threshold to thereby output a quantized value obtained by quantizing the third value, and a feedback section configured to output, based on a time event of the second signal, the second value based on the quantized value. The frequency ratio measurement device outputs, based on the quantized value, a delta-sigma modulated signal corresponding to a frequency ratio of the first signal and the second signal.

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Suwa, Japan

Masayoshi Todorokihara