Mitsubishi Denki Kabushiki Kaisha

Mitsubishi Electric Corporation

Masayoshi Takemi

Akihito Ohno

Kenichi Ono

Nobuyuki Tomita

Tatsuya Kimura

Norio Hayafuji

Hirotaka Kizuki

Yoshihiko Hanamaki

Makoto Takada

Daisuke Suzuki

Manabu Kato

Takashi Motoda

Harumi Nishiguchi

Wataru Susaki

Nobuaki Kaneno

Yuichiro Okunuki

Chikara Watatani

Yuji Ohkura

Takushi Itagaki

Tetsuo Shiba

Kimitaka Shibata

Kenzo Mori

Toru Ota

Shiro Ryochiku

A nitride semiconductor laminated structure comprises: a substrate; a first p-type nitride semiconductor layer formed using an organometallic compound as a Group III element source material, a p-type impurity source material, and ammonia as a Group V element source material, with the hydrogen concentration in the first p-type nitride semiconductor layer being 1&#xd7;10cmor less; and a second p-type nitride semiconductor layer on the first p-type nitride semiconductor layer formed using an organometallic compound as a Group III element source material, a p-type impurity source material, and ammonia and a hydrazine derivative as Group V element source materials, with the carbon concentration in the second p-type nitride semiconductor layer being 1&#xd7;10cmor less.

Method for production of a nitride semiconductor laminated structure and an optical semiconductor device

A method for manufacturing a nitride semiconductor device, includes forming a p-type nitride semiconductor layer on a substrate, from an organic metal compound as a group III element source material, ammonia and a hydrazine derivative as group V element source materials, and a Mg source material gas as a p-type impurity source material. The flow velocity of the source material gases including the group III element source material, the group V element source materials, and the p-type impurity source material is more than 0.2 m/sec.

Method for manufacturing nitride semiconductor device

A nitride semiconductor stacked structure having good working efficiency includes a p-type nitride semiconductor layer of low resistance, which is formed from an organometallic compound, compounds including Group V elements, including ammonia and a hydrazine derivative, and a p-type impurity material on a substrate. The p-type nitride layer has a carbon concentration not higher than 1&#xd7;10cm.

Method for manufacturing nitride semiconductor stacked structure and semiconductor light-emitting device

A technique is provided which enables formation of nitride semiconductor layers with excellent flatness and excellent crystallinity on a gallium nitride substrate (GaN substrate), while improving the producibility of the semiconductor device using the GaN substrate. A gallium nitride substrate is prepared which has an upper surface having an off-angle of not less than 0.1&#xb0; nor more than 1.0&#xb0; in a &#x3c;1-100&#x3e; direction, with respect to a (0001) plane. Then, a plurality of nitride semiconductor layers including an n-type semiconductor layer are stacked on the upper surface of the gallium nitride substrate to form a semiconductor device such as a semiconductor laser.

Semiconductor device manufacturing method

A first buffer layer (GaAs), a second buffer layer (AlGaAs), and a diffusion suppressing layer consisting of GaAs or AlGaAs are stacked on a GaAs substrate. The structure has a first cladding layer thereon. When AlGaAs is used for the diffusion suppressing layer, the Al ratio of AlGaAs is made smaller than in the second buffer layer. In such a structure, when a window region is formed, the diffusion rate of the impurity (Zn) can be lowered in the diffusion suppressing layer, and the diffusion of the impurity can be stopped at the second buffer layer.

Semiconductor laser having an improved window layer and method for the same

A laser diode includes a first n-cladding layer disposed on and lattice-matched to an n-semiconductor substrate, wherein the first n-cladding layer is n-AlGaInP or n-GaInP; a second n-cladding layer of n-AlGaAs supported by the first n-cladding layer; and an inserted layer disposed between the first n-cladding layer and the second n-cladding layer, wherein the inserted layer includes the same elements as the first n-cladding layer, the inserted layer has the same composition ratios of Al and Ga (and P) as the first n-cladding layer, and the inserted layer contains a lower composition ratio of In than the first n-cladding layer.

Semiconductor device and manufacturing method therefor

A semiconductor laser device includes: an n-type cladding layer, an active layer, and a p-type cladding layer, each being a III-V group compound semiconductor, supported on a substrate of n-type GaAs, a p-type band discontinuity reduction layer of a III-V group compound semiconductor on the p-type cladding layer, and a p-type GaAs cap layer on the band discontinuity reduction layer. The p-type cladding layer, the p-type band discontinuity reduction layer, and the p-type cap layer are each doped with a p-type dopant which is lower in diffusivity than Zn. The p-type band discontinuity reduction layer has a concentration of a p-type dopant lower in diffusivity than Zn of 2.5&#xd7;10cmor higher to attain desired device characteristics, for example, high power output and efficiency.

Semiconductor laser device and method for manufacturing the same

A p-type InP buffer layer containing Zn in a low concentration and an undoped InP buffer layer having a carrier concentration of 3&#xd7;10cmor less are stacked on a p-type InP substrate containing Zn. On the undoped InP buffer layer, a Mg-doped p-type InP cladding layer, an InGaAsP optical confinement layer, an InGaAsP MQW active layer, an n-type InGaAsP optical confinement layer, and an n-type InP cladding layer are successively stacked. The diffusion of Zn from the p-type InP substrate into the InGaAsP MQW active layer is suppressed. Moreover, a steep doping profile can be formed in the vicinity of the active layer so that deterioration of device characteristics is suppressed.

Semiconductor laser

The present invention provides a semiconductor light emitting device where a spatial change in an In composition ratio is small within a plane of an active layer and device properties such as efficiency of light emission are excellent, and a manufacturing method thereof. An active layer having an InGaN quantum well structure is formed in such a manner that a ratio of a photoluminescence light emission intensity at 300 K to a photoluminescence light emission intensity at 5 K becomes 0.1 or less. The ratio of the photoluminescence light emission intensity reflects the degree of the spatial change in an In composition ratio in a quantum confined structure. In addition, a smaller value indicates a higher spatial uniformity in the In composition ratio. Therefore, there is greater spatial uniformity in the In composition ratio in the active layer, increasing the probability of radiative recombination of carriers occurring, by making the ratio of photoluminescence light emission intensity 0.1 or less; thus, it becomes possible to obtain a semiconductor light emitting device having high efficiency in light emission.

Method of manufacturing semiconductor light emitting device

A semiconductor laser device includes an n type diffraction grating layer of n-InGaAsP on an n-InP substrate, and having through-holes periodically disposed alongside of one another in a laser optical waveguide direction, an n-InP layer containing S as a dopant impurity in a concentration of at least 1&#xd7;10cm. The through holes are buried in the n-InP layer, and an active layer is disposed on both the n-InP layer and the diffraction grating layer through an n-InP cladding layer.

Semiconductor laser device

A method of etching a III-V compound semiconductor uses an etching gas including the group V element of the III-V compound semiconductor substrate layer while keeping the III-V compound semiconductor layer at a temperature higher than the crystal growth temperature of the III-V compound semiconductor. Etching using this method provides a higher degree of controllability than wet etching. In addition, because no etching solution is employed, the etching method can be employed in a crystal growth apparatus. Further, because an element of the III-V compound semiconductor layer is employed in the etching gas, incorporation of residual impurities can be prevented, keeping the etched surface clean.

Method for etching a semiconductor method for fabricating semiconductor

A semiconductor device includes a p type InP substrate with a (001) surface; a mesa structure formed by dry etching, extending along a &lt;110&gt; direction, including semiconductor layers, having (110) side surfaces, and a height H.sub.m ; and mesa burying layers including a p type InP burying layer on the (110) side surfaces and the (001) surface, the p type InP burying layer having a thickness D.sub.p, and an n type InP burying layer on the p type InP burying layer. An angle between a (111)B surface and (001) surface is .theta..sub.111, the growth rates on the (110) side surfaces and on the (001) surface are respectively R.sub.g (110) and R.sub.g (001), an angle .theta. is tan .theta.=R.sub.g (110)/R.sub.g (001) and the critical thickness D.sub.n of the n type InP burying layer on the (001) surface when the n type InP burying layer is not grown on the (111)B surface is ##EQU1## The n type InP burying layer has a thickness D.ltoreq.D.sub.n. The leakage current path width is narrowed and contact of the n type InP burying layer and an uppermost layer of the semiconductor layers is avoided. Consequently, a semiconductor device having reduced leakage current and superior device characteristics is obtained.

In a thermal radiation type substrate heating system of an MOCVD growth apparatus, a susceptor includes a semi-circular concavity is formed in each of wafer pockets at the forward area in a wafer rotation direction so that P-richness in a crystalline film grown at the gas upstream area is suppressed. Specifically, the conventional wafer holder exhibits a non-uniform temperature distribution so that the surface temperature is high at the gas upstream area and low at the downstream area. On the other hand, the structure according to the present invention realizes a high temperature at a wafer contact area and a low temperature at a wafer non-contact area, thus leading to a uniform surface temperature over the entire gas upstream and downstream areas.

Vapor-phase growth apparatus and compound semiconductor device

A substrate holder employed for MOCVD and supporting a wafer on which crystal growth proceeds includes a molybdenum holder body, a GaAs polycrystalline film with a flat surface grown on a part of the surface of the molybdenum holder body where the wafer is absent, and an InP polycrystalline film grown on the GaAs polycrystalline film. Each of the polycrystalline films is grown to a thickness of 0.3 .mu.m or more at a temperature higher than the epitaxial growth temperature of 575.degree. C. During the MOCVD process, the emissivity of the molybdenum substrate holder is stable at a value near the emissivity of the wafer on the substrate holder and, therefore, the decomposition ratio of PH.sub.3 gas on the substrate holder is stable at a value near the decomposition ratio on the wafer, whereby any variation of the incorporation ratio of P atoms in the grown InGaAsP, i.e., a variation of the composition of the InGaAsP, is reduced and run-to-run variations of the composition of the grown crystal are reduced.

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Tokyo, Japan

Masayoshi Takemi