Kabushiki Kaisha Toshiba

Other

Toshiba Memory Corporation

Kioxia Corporation

Masayoshi Iwayama

Yoshiaki Asao

Takeshi Kajiyama

Hisanori Aikawa

Daisuke Watanabe

Tatsuya Kishi

Toshihiko Nagase

Tadashi Kai

Masahiko Nakayama

Minoru Amano

Keiji Hosotani

Akiyuki Murayama

Kyoichi Suguro

Masatoshi Yoshikawa

Gaku Minamihaba

Hiroyuki Kanaya

Yukiteru Matsui

Shigeki Takahashi

Sumio Ikegawa

Masako Kodera

Motoyuki Sato

Kuniaki Sugiura

Hajime Eda

A magnetic memory device including a first memory cell which includes a first stacked structure including a magnetic layer and a second memory cell which is provided on the first memory cell and includes a second stacked structure including a magnetic layer. Each of the first stacked structure and the second stacked structure includes a first magnetic layer having a variable magnetization direction, a second magnetic layer having a fixed magnetization direction, and a nonmagnetic layer provided between the first magnetic layer and the second magnetic layer. A concentration of iron (Fe) contained in the first magnetic layer included in the first stacked structure and a concentration of iron (Fe) contained in the first magnetic layer included in the second stacked structure are different from each other.

Magnetic memory device

According to one embodiment, a magnetic memory device includes a first memory cell which includes a first stacked structure including a magnetic layer, and a second memory cell which is provided on the first memory cell and includes a second stacked structure including a magnetic layer, wherein each of the first stacked structure and the second stacked structure has a structure in which a plurality of layers including a predetermined layer are stacked, and the predetermined layer included in the first stacked structure and the predetermined layer included in the second stacked structure have different thicknesses.

According to one embodiment, a magnetoresistive memory device includes a first magnetic layer, a second magnetic layer on one major surface side of the first magnetic layer via a first nonmagnetic layer, a third magnetic layer on the second magnetic layer via a first Ru layer, a sidewall insulating film on sides of the layers, a fourth magnetic layer on an other major surface side of the first magnetic layer via a second nonmagnetic layer, and a fifth magnetic layer on the fourth magnetic layer via a second Ru layer. The reversed magnetic field of the second magnetic layer is smaller than that of the third and fourth magnetic layers, and the reversed magnetic field of the fifth magnetic layer is smaller than that of the third and fourth magnetic layers.

Magnetoresistive memory device and manufacturing method of the same

According to one embodiment, a method for manufacturing a magnetic memory is disclosed. The method includes forming a magnetoresistive element on a substrate. The method further includes measuring an electrical characteristic of the magnetoresistive element, and applying a voltage to the magnetoresistive element which the electrical characteristic is measured.

Method for manufacturing magnetic memory

According to one embodiment, a magnetic memory is disclosed. The magnetic memory includes a substrate and an underlying layer provided on the substrate. The underlying layer includes a first underlying layer and a second underlying layer surrounding the first underlying layer. The first and second underlying layers contain a metal of a same type. The first underlying layer includes a lower part which is greater than the upper part in width. The magnetic memory further includes a magnetoresistive element provided on the underlying layer.

Magnetic memory and method for manufacturing the same

According to one embodiment, a manufacturing method of a magnetic memory device, includes obtaining first and second magnetic fields for each of magnetoresistive effect elements, defining a group of the elements, for the first and second magnetic fields of the elements in the group, a highest first magnetic field being lower than a lowest second magnetic field, and a difference between the highest first magnetic field and the lowest second magnetic field being greater than a predetermined difference, determining a maximum applied magnetic field higher than the highest first magnetic field and lower than the lowest second magnetic field, and obtaining magnetic characteristics for each of the elements in the group by applying a magnetic field decreasing from the maximum applied magnetic field after the magnetic field is increased up to the maximum applied magnetic field.

Manufacturing method of magnetic memory device

According to one embodiment, a magnetic memory is disclosed. The magnetic memory includes an underlying structure having conductivity provided on the substrate and including a first layer with a polycrystalline structure and a second layer with an amorphous structure, and a magnetoresistive element provide on the underlying layer. The magnetoresistive element includes a first magnetic layer provided on the underlying layer, a non-magnetic layer provided on the first magnetic layer, and a second magnetic layer provided on the non-magnetic layer.

The semiconductor storage device includes a memory cell array region in which a plurality of storing MTJ elements capable of changing resistance depending on a direction of magnetization are arranged on a semiconductor substrate. The semiconductor storage device includes a resistive element region in which a plurality of resisting MTJ elements are arranged on the semiconductor substrate along a first direction and a second direction perpendicular to the first direction. An area of a first cross section of the resisting MTJ element parallel with an upper surface of the semiconductor substrate is larger than an area of a second cross section of the storing MTJ element parallel with the upper surface of the semiconductor substrate.

Semiconductor storage device and method of manufacturing the same

According to one embodiment, a magnetic memory includes a magnetoresistive effect element provided in a memory cell, the magnetoresistive effect element including a multilayer structure including a first magnetic layer, a second magnetic layer, and a nonmagnetic layer between the first magnetic layer and the second magnetic layer, a first electrode provided on an upper portion of the multilayer structure and including a first material, and a first film provided on a side surface of the first electrode and including a second material which is different from the first material of the first electrode.

Magnetic memory and manufacturing method thereof

According to one embodiment, a magnetic storage device includes an insulating region, a lower electrode including a first portion formed in a hole provided in the insulating region and a second portion protruded from the insulating region, a spacer insulating film formed on a side surface of at least the second portion of the lower electrode, a magnetic tunneling junction portion formed on a top surface of the lower electrode, and an upper electrode formed on the magnetic tunneling junction portion.

Magnetic storage device

According to one embodiment, a memory includes a resistance change element on an interlayer insulating film and including a lower electrode and an upper electrode, a sidewall insulating film on a side surface of the element, a plug in the interlayer insulating film and connected to the lower electrode, an interconnect on the interlayer insulating film and connected to the upper electrode. The element is provided immediately above the plug, the interconnect covers the side surface of the element via the sidewall insulating film, an upper surface of the first plug is covered with the lower electrode and the sidewall insulating film.

Resistance change type memory and manufacturing method thereof

According to one embodiment, a semiconductor device includes a switch element provided in a surface area of a semiconductor substrate, a contact plug with an upper surface and a lower surface, and a function element provided on the upper surface of the contact plug. The lower surface of the contact plug is connected to the switch element. The upper surface of the contact plug has a maximum roughness of 0.2 nm or less.

Semiconductor device and method of manufacturing the same

A magnetoresistive element of an aspect of the present invention including a lower electrode provided on an insulating layer on a semiconductor substrate, a first ferromagnetic layer provided on the lower electrode, a first tunnel barrier layer provided on the first ferromagnetic layer, a second ferromagnetic layer provided on the first tunnel barrier layer, and an upper electrode provided on the second ferromagnetic layer, wherein the upper electrode has a hexagonal cross-sectional shape, and a maximum size of the upper electrode in a first direction is larger than a size of the first tunnel barrier layer in the first direction, the first direction being horizontal relative to a surface of the semiconductor substrate.

Magnetoresistive element including upper electrode having hexagonal cross-section shape and method of manufacturing the same

First semiconductor layers are in source/drain regions on the semiconductor substrate. A second semiconductor layer comprises first portions on the first semiconductor layers and a second portion in a linear form in a channel region between the source/drain regions. A gate electrode is around the second portion of the second semiconductor layer via an insulating film. A film thickness of the second portion of the second semiconductor layer is smaller than a film thickness of the first portion of the second semiconductor layer.

Semiconductor device and manufacturing method thereof

First semiconductor layers are in source/drain regions on the semiconductor substrate. A second semiconductor layer comprises first portions on the first semiconductor layers and a second portion on a channel region between the source/drain regions. Third semiconductor layers are on the first portions of the second semiconductor layer. A gate electrode is around the second portion of the second semiconductor layer via an insulating film. Contact plugs are in the first semiconductor layers, the first portions of the second semiconductor layers and the third semiconductor layers in the source/drain regions. A diameter of the contact plug in the second semiconductor layer is smaller than a diameter of the contact plug in the first and third semiconductor layers.

Growing community of inventors

Kawasaki, Japan

Masayoshi Iwayama