Sumitomo Electric Industries, Limited

Tohoku University

Sumitomo Electric Device Innovations, Inc.

Matsushita Electric Industrial Co., Ltd.

Masaya Okada

Makoto Kiyama

Masaki Ueno

Seiji Yaegashi

Yu Saitoh

Kazutaka Inoue

Fuminori Mitsuhashi

Yasunori Tateno

Mitsunori Yokoyama

Maki Suemitsu

Hirokazu Fukidome

Ken Nakata

Hiroshige Hirano

Hiroyuki Nagasawa

Kazuhide Sumiyoshi

Takumi Yonemura

Makato Kiyama

A semiconductor device includes a substrate, a semiconductor stacking portion formed on the substrate, a silicon nitride passivation film covering the surface of the semiconductor stacking portion, and oxygen atoms existing at an interface between the silicon nitride passivation film and the semiconductor stacking portion. The semiconductor stacking portion includes a plurality of nitride semiconductor layers. The interfacial oxygen content at the passivation film and stacking portion interface is 0.6×10oxygen atoms/cmor less.

Semiconductor device with silicon nitride passivation film

A stacked body includes: a substrate made of silicon carbide and having a first main surface forming an angle of 20&#xb0; or less with a silicon plane; and a graphene film disposed on the first main surface and having an atomic arrangement oriented in relation to an atomic arrangement of silicon carbide forming the substrate. In an exposed surface of the graphene film which is a main surface opposite to the substrate, an area ratio of a region having a full width at half maximum of G' of 40 cmor less under Raman spectroscopy analysis is 50% or more. Accordingly, the stacked body is provided that enables a high mobility to be stably ensured in an electronic device manufactured to include the graphene film forming an electrically conductive portion.

Stacked body including graphene film and electronic device including graphene film

A stacked body includes: a substrate made of silicon carbide and having a first main surface forming an angle of 20&#xb0; or less with a carbon plane; and a graphene film disposed on the first main surface and having an atomic arrangement oriented in relation to an atomic arrangement of silicon carbide forming the substrate. In an exposed surface of the graphene film as seen in plan view, 10 or less regions are present per 1 mm, the exposed surface being a main surface opposite to the substrate, and the regions each including 10 or more graphene layers and having a circumcircle with a diameter of 5 &#x3bc;m or more and 100 &#x3bc;m or less. Accordingly, the stacked body is provided that enables a high mobility to be stably ensured in an electronic device manufactured to include the graphene film forming an electrically conductive portion.

Stacked body and electronic device

A silicon carbide (SiC) structure and a method of forming the SiC structure are disclosed. The SiC structure includes an SiC substrate and a film provided on the SiC substrate. The SiC substrate contains both of a hexagonal close packed (hcp) structure and a face centered cubic (fcc) structure, and has only one of the hcp surface and the fcc surface, where the hcp surface includes atoms in the topmost layer whose rows overlap with rows of atoms in the third layer, while, the fcc surface includes atoms in the topmost layer whose rows are different from rows of atoms in the third layer.

SiC structure, semiconductor device having SiC structure, and process of forming the same

An electron device having a channel layer made of graphene is disclosed. The electron device includes a graphene layer on a substrate, and a source electrode, a drain electrode, and a gate insulating film on the graphene layer. The electron device further includes a first gate electrode on the gate insulating film between the source electrode and the drain electrode, and a second gate electrode within the substrate. For the second gate electrode, another gate insulating film is on the graphene layer, or alternatively, a part of the substrate is interposed between the second gate electrode and the channel layer.

Semiconductor device

A substrate includes: a support substrate having a first main surface and a surface layer region which includes at least the first main surface and is formed of any one material selected from the group consisting of boron nitride, molybdenum disulfide, tungsten disulfide, niobium disulfide, and aluminum nitride; and a graphene film disposed on the first main surface and having an atomic arrangement oriented in relation to an atomic arrangement of the material forming the surface layer region. Accordingly, the substrate is provided that enables a high mobility to be stably ensured in an electronic device manufactured to include the graphene film forming an electrically conductive portion.

Substrate and electronic device

There are provided a semiconductor device in which a drain leak current can be reduced in the transistor operation while high vertical breakdown voltage is achieved and a method for producing the semiconductor device. In the semiconductor device, an openingthat extends from an n-type contact layerand reaches an n-type drift layerthrough a p-type barrier layeris formed. The semiconductor device includes a regrown layerlocated so as to cover portions of the p-type barrier layerand the like that are exposed to the opening, the regrown layerincluding an undoped GaN channel layerand a carrier supply layer; an insulating layerlocated so as to cover the regrown layer; and a gate electrode G located on the insulating layer. In the p-type barrier layer, the Mg concentration A (cm)and the hydrogen concentration B (cm) satisfy 0.1&#x3c;B/A&#x3c;0.9 . . . (1).

Semiconductor device including GaN-based compound semiconductor stacked layer and method for producing the same

A vertical semiconductor device in which pinch-off characteristics and breakdown voltage characteristics can be stably improved by fixing the electric potential of a p-type GaN barrier layer with certainty is provided. The semiconductor device includes a GaN-based stacked layer having an opening, a regrown layer including a channel located so as to cover a wall surface of the opening, an n-type source layer that is in ohmic contact with the source electrode, a p-type GaN barrier layer, and a p-type GaN-based supplementary layer located between the p-type GaN barrier layer and the n-type source layer. The p-type GaN-based supplementary layer and the n-type source layer form a tunnel junction to fix the electric potential of the p-type GaN barrier layer at a source potential.

Vertical GaN-based semiconductor device

It is an object to improve the breakdown voltage characteristics of a vertical semiconductor device having an opening and including a channel formed of two-dimensional electron gas in the opening. A GaN-based stacked layerincludes n-type GaN drift layer/p-type GaN barrier layer/n-type GaN contact layer. An openingextends from a top layer and reaches the n-type GaN drift layer. The semiconductor device includes a regrown layerlocated so as to cover a wall surface and a bottom portion of the opening, the regrown layerincluding an electron drift layerand an electron source layer, a source electrode S located around the opening, a gate electrode G located on the regrown layer in the opening, and a bottom insulating layerlocated in the bottom portion of the opening.

Semiconductor device and method for producing the same

It is an object to improve the breakdown voltage characteristics of a vertical semiconductor device having an opening and including a channel formed of two-dimensional electron gas in the opening. The vertical semiconductor device includes a GaN-based stacked layerhaving an openingand the GaN-based stacked layerincludes n-type GaN-based drift layer/p-type GaN-based barrier layer/n-type GaN-based contact layer. The vertical semiconductor device includes a regrown layerlocated so as to cover the opening, the regrown layerincluding an electron drift layerand an electron supply layer, a source electrode S, and a gate electrode G located on the regrown layer. The gate electrode G covers a portion having a length corresponding to the thickness of the p-type GaN-based barrier layer and is terminated at a position on the wall surface, the position being away from the bottom portion of the opening.

Semiconductor device and method for producing same

In a vertical semiconductor device including a channel in an opening, a semiconductor device whose high-frequency characteristics can be improved and a method for producing the semiconductor device are provided. The semiconductor device includes n-type GaN-based drift layer/p-type GaN-based barrier layer/n-type GaN-based contact layer. An openingextends from a top layer and reaches the n-type GaN-based drift layer. The semiconductor device includes a regrown layerlocated so as to cover the opening, the regrown layerincluding an electron drift layerand an electron supply layer, a source electrode S, a drain electrode D, and a gate electrode G located on the regrown layer. Assuming that the source electrode serving as one electrode and the drain electrode serving as the other electrode constitute a capacitor, the semiconductor device includes a capacitance-decreasing structure that decreases the capacitance of the capacitor.

There is provided a vertical GaN-based semiconductor device in which the on-resistance can be decreased while the breakdown voltage characteristics are improved using a p-type GaN barrier layer. The semiconductor device includes a regrown layerincluding a channel located on a wall surface of an opening, a p-type barrier layerwhose end face is covered, a source layerthat is in contact with the p-type barrier layer, a gate electrode G located on the regrown layer, and a source electrode S located around the opening. In the semiconductor device, the source layer has a superlattice structure that is constituted by a stacked layer including a first layer (a layer) having a lattice constant smaller than that of the p-type barrier layer and a second layer (b layer) having a lattice constant larger than that of the first layer.

There are provided a high current semiconductor device that has low on-resistance, high mobility, and good pinch-off characteristics and in which a kink phenomenon is not easily caused even if a drain voltage is increased, and a method for producing the semiconductor device. The semiconductor device of the present invention includes a GaN-based layered bodyhaving an opening, a regrown layerincluding a channel, a gate electrode G, a source electrode S, and a drain electrode D. The regrown layerincludes an electron transit layerand an electron supply layer. The GaN-based layered body includes a p-type GaN layerwhose end surface is covered by the regrown layer in the opening, and a p-side electrodethat is in ohmic contact with the p-type GaN layer is disposed.

Semiconductor device and method for manufacturing same

There are provided a semiconductor device that includes a bypass protection unit against surge voltage or the like, achieves good withstand voltage characteristics and low on-resistance (low On-state voltage), has a simple structure, and is used for large-current purpose and a method for producing the semiconductor device. In the present invention, the semiconductor device includes an n-type GaN substratehaving a GaN layer that is in ohmic contact with a supporting substrate, a FET having an n-type GaN drift layerin a first region R, and an SBD having an anode electrode in a second region R, the anode electrode being in Schottky contact with the d-type GaN drift layer. The FET and the SBD are arranged in parallel. A drain electrode D of the FET and a cathode electrode C of the SBD are formed on the back of the n-type GaN substrate

The semiconductor device includes a GaN-based layered body having an opening and including an n-type drift layer and a p-type layer located on the n-type drift layer, a regrown layer including a channel and located so as to cover the opening, and a gate electrode located on the regrown layer and formed along the regrown layer, wherein the opening reaches the n-type drift layer, and an edge of the gate electrode is not located outside a region of the p-type layer when viewed in plan.

Growing community of inventors

Osaka, Japan

Masaya Okada