International Business Machines Corporation

Masaya Mori

Shinpei Watanabe

Toshio Sunaga

Yoshihisa Takatsu

Nobuyoshi Tanaka

Masatoshi Itoh

Kazunori Takayanagi

Yasumasa Tomonaga

Yutaka Morimoto

Toshiroh Tabata

Hiroji Itoh

Embodiments of the present invention provide method and device for searching fixed length data. The device includes a hash operation means for operating and outputting a hash value of inputted fixed length data, a data table memory consisting of N numbers of memory banks, where N is an integer that is more than and equal to 2, the data table memory for storing a data table holding a large number of fixed length data, a pointer table memory for storing a memory pointer table holding a memory address at which each fixed length datum is stored with the hash value as an index, and a comparison means for simultaneously comparing a plurality of fixed length data stored at the same memory address in the N numbers of memory banks with a single fixed length datum inputted to the hash operation means, the comparison means for outputting results of the comparison.

Method and device for searching fixed length data

A communication control apparatus includes search information associated with a tree structure. A mask prefix is associated with at least one entry, each entry including information on the mask length of a mask prefix associated therewith and a sort key. Each entry is assigned to a node in the tree structure according to a sorting order. Each node is linked to a different node at the next lower hierarchy via a branch based on the entry of the node. A destination address of the packet received is first extracted, and a search target node specified by a search control for an entry having information on the best matched prefix of the extracted address is then searched for. After completion of the node-by-node search process, a transfer route is determined for the packet received based on the longest prefix amongst the most appropriate prefixes of all the current search target nodes.

Communication control apparatus and method for searching an internet protocol address

Upon implementing a data registration into or a data retrieval from a data table () where first item data are registered along with corresponding second item data, there are used a first pointer table () where pointers to part of the registered data in the data table are registered in storage positions that are designated by hash values obtained by applying a first hash function () to the first item data of the part of the registered data, and a second pointer table () where pointers to the other registered data in the data table are registered in storage positions that are designated by hash values obtained by applying a second hash function () to the first item data of the other registered data.

Information processing device and method, program, data structure, and computer-readable recording medium

The present invention relates to a DRAM having a memory array that is divided into a plurality of memory blocks. A memory block having a long data retention time is selected from the plurality of memory blocks and a logical address is allocated to the selected memory block. The selected memory block is refreshed at longer time intervals compared to conventional DRAMs resulting in lower power consumption.

DRAM and refresh method thereof

When an output of data is switched from a memory to a memory controller, the memory controller takes in write data output from the memory, and outputs the write data taken in to a data bus. Subsequently, the memory controller outputs read data taken thereinto to the data bus, and then outputs write data of its own to the data bus.

Data input/output device, memory system, data input/output circuit, and data input/output method

A distributor and a search controller are added to the memory. A search is performed with an algorithm such as quick search by repeating reading of memory cells, comparing of the reading result, and narrowing down of entries to be compared based on the comparison result. Performing this sequential processing in the memory provides valid data in a bus time plus about half of a cycle time required in repeating reading a conventional memory. Then, the latter half of the cycle time can be used for comparison, as well as generation of the next memory cell address, so that the search can be finished in a bus time multiplied by the number of repetitions of reading the memory cells plus one bus time. As a result, a CAM function can be achieved that allows for more than tens of thousands of entry data items, the number of which is equal to the size of DRAM divided by the number of banks, rather than hundreds or thousands of entry data items as conventional CAM.

Search memory, memory search controller, and memory search method

The object of this invention is to provide a timing circuit that can change a clock period with low power consumption. The timing circuit includes a clock generator, comparatorsandfor comparing an inputted control voltage TDV and reference voltages VR, respectively, retaining circuitsandfor retaining outputs of the comparators, respectively, and circuitsandfor producing timing pulses TDT as an output thereof based on outputs of the retaining circuits and clock signals outputted from the clock generator. Each comparator receives a first clock signal SS outputted from the clock generator and is operated only for a time corresponding to a short pulse width of the first clock signal SS.

Timing circuit and method of changing clock period

Since the surface of the touch panel is often slippery, pressure points of the writing stylus on a touch panel may easily skip along the input contiguous line. The present invention calculates the velocity of writing stylus movement at each segment of the input contiguous line from a touch location and detection time of each touch which may be detected at intervals, produces a line drawing which connects each pair of touch locations of touches that are temporally adjacent in the detection order with a line of a type determined based on the calculated velocity, and displays the line drawing on the LCD.

Pressure sensitive writing tablet, control method and control program therefor

To rapidly draw straight lines and circular arcs of width 1 on a raster scan graphic display by determining whether or not the point, the X coordinate of which is incremented by 1 relative to the current point, and the point, the Y coordinate of which is incremented by 1 relative to the current point, are between the outlines f1 and f2 defining a straight line of width 1. If the point, the x coordinate of which is incremented by 1, is between the outlines f1 and f2, it is plotted and selected as the next pixel. If this is not the case, and the point, the y coordinate of which is incremented by 1, is between the outlines f1 and f2, it is plotted and selected as the next point. If neither point is between the outlines f1 and f2, the point, the x and y coordinates of which are incremented by 1, is plotted and selected as the next pixel.

Method and system for drawing narrow lines on a computer display

The fill processing time for filling a closed figure identified by one stroke is reduced. The difference between the total number of line segments in the plus Y axis direction and that in the minus Y direction intersecting a line perpendicular to a specific first direction is counted when a figure identified by one stroke is scanned in the X axis direction. Pixel positions in a range in which the counting result is not '0' are filled.

Method and apparatus for image filling of a continuous contour figure

Data processing apparatus including a display monitor operable in response to a display signal of predetermined frequency and a computer for transmitting a display signal to the display monitor. The display monitor generates an identifier signal indicating the predetermined frequency at which the display monitor operates. The computer means uses the identifier signal to determine the frequency of the display signal.

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Kawasaki, Japan

Masaya Mori