Matsushita Electric Industrial Co., Ltd.

Panasonic Corporation

Maxell, Ltd.

Tower Semiconductor Ltd.

Masatoshi Arai

Toshiki Yabu

Mizuki Segawa

Takaaki Ukeda

Takashi Nakabayashi

Takashi Uehara

Takayuki Yamada

Kyoji Yamashita

Michikazu Matsumoto

Isao Miyanaga

Fumihiko Noro

Nobuyoshi Takahashi

Koji Yoshida

Keita Takahashi

Koji Eriguchi

Masaru Moriwaki

Satoshi Iwamoto

Bunji Mizuno

Yakov Roizin

Kazuo Shikita

Michihiko Takase

Efraim Aloni

Micha Gutman

Menachem Vofsy

Takahiko Hashidzume

Toshinari Nitta

Shunsuke Kugo

Avi Ben-Gigi

Hiroshi Shiina

Kentaro Sano

A light source device includes an excitation-light light source which emits excitation light, a reflection member which reflects the excitation light, a lens which is arranged on an optical path of the excitation light which leads from the excitation-light light source to the reflection member and refracts the excitation light, a housing which houses the reflection member in a hermetically sealed internal space, an operation member which is exposed from the housing in a direction which intersects the optical path and is moved towards the inside and outside of the housing, and an adjustment mechanism which adjusts a length of an optical path between the reflection member and the lens in linkage with the operation member which is moved towards the inside and outside of the housing.

Light source device, projector and lighting device

A light source device comprises: an excitation light source configured to generate excitation light; a wavelength conversion member including a base and a phosphor layer which is provided on the base and configured to convert the excitation light into fluorescence; and a converging optical system including a converging lens for converging the excitation light on the phosphor layer, wherein the light source device further comprises a housing for accommodating the wavelength conversion member, the excitation light source is provided outside the housing, a wall surface of the housing includes a lens hole into which the converging lens is inserted, and the converging lens which is inserted into the lens hole and the wall surface of the housing isolate an internal space of the housing from an outer space of the housing.

Light source device, projector, and lighting device

First, on a semiconductor region of a first conductivity type, a trapping film is formed which stores information by accumulating charges. Then, the trapping film is formed with a plurality of openings, and impurity ions of a second conductivity type are implanted into the semiconductor region from the formed openings, thereby forming a plurality of diffused layers of the second conductivity type in portions of the semiconductor region located below the openings, respectively. An insulating film is formed to cover edges of the trapping film located toward the openings, and then the semiconductor region is subjected to a thermal process in an atmosphere containing oxygen to oxidize upper portions of the diffused layers. Thereby, insulating oxide films are formed in the upper portions of the diffused layers, respectively. Subsequently, a conductive film is formed over the trapping film including the edges thereof to form an electrode.

Method for fabricating semiconductor device

A semiconductor device includes a memory section formed at a semiconductor substrate and including a first transistor having an ONO film that can store charges between the semiconductor substrate and a memory electrode and a first STI region for isolating the first transistor, and a CMOS section formed at the semiconductor substrate and including a second transistor having a CMOS electrode and a gate dielectric and a second STI region for isolating the second transistor. The height of the top surface of the first STI region is set equal to or smaller than the height of the top surface of the second STI region.

Semiconductor device and method for fabricating the same

A method of fabricating a nonvolatile semiconductor memory device includes the steps of: (a) forming a layered dielectric film on the semiconductor substrate; (b) forming a first conductive film on the layered dielectric film; (c) forming a first dielectric film on the first conductive film; (d) patterning the first dielectric film and the first conductive film to form a layered pattern composed of first dielectric films and first conductive films; and (e) implanting a first impurity along a direction having an inclination angle to a normal direction to a principal plane of the semiconductor substrate by using the layered pattern as a mask to form a first impurity diffusion layer being the same in conductivity type as the semiconductor substrate, wherein, step (d) includes patterning the first dielectric film to form the first dielectric films having a shape with a width narrower in an upper surface than in a lower surface.

Method of fabricating nonvolatile semiconductor memory device

Semiconductor device

A nonvolatile semiconductor memory device includes: a gate dielectric made of a multilayer dielectric that is formed on a substrate and discretely accumulates charges; a gate electrode formed on the gate dielectric; a pair of diffusion regions formed in the surface of the substrate with the gate electrode interposed therebetween and serving as a source and a drain; and a channel region existing between the diffusion regions. At least one of regions of the gate dielectric located between the pair of diffusion regions and lateral end parts of the gate electrode opposed to the diffusion regions includes a fixed charge accumulation region in which charges produced by irradiating the gate electrode with ultraviolet light can be accumulated, and at least one said diffusion region located below the fixed charge accumulation region is formed to overlap with the fixed charge accumulation region in plan configuration and extend beyond the fixed charge accumulation region toward the middle of the channel region in plan configuration.

Nonvolatile semiconductor memory device and method for fabricating the same

A method for fabricating a semiconductor memory device in which a logic circuit and a nonvolatile memory are provided on a semiconductor substrate includes the steps of: forming an isolation region; forming a protective film made of an insulating material over the semiconductor substrate in a logic circuit region and a nonvolatile memory region; selectively introducing impurity ions in part of the semiconductor substrate in the logic circuit region; and removing the protective film formed over the logic circuit region. The step of introducing the impurity ions is performed before the step of removing the protective film is performed.

Method for fabricating semiconductor memory device

An isolation which is higher in a stepwise manner than an active area of a silicon substrate is formed. On the active area, an FET including a gate oxide film, a gate electrode, a gate protection film, sidewalls and the like is formed. An insulating film is deposited on the entire top surface of the substrate, and a resist film for exposing an area stretching over the active area, a part of the isolation and the gate protection film is formed on the insulating film. There is no need to provide an alignment margin for avoiding interference with the isolation and the like to a region where a connection hole is formed. Since the isolation is higher in a stepwise manner than the active area, the isolation is prevented from being removed by over-etch in the formation of a connection hole to come in contact with a portion where an impurity concentration is low in the active area. In this manner, the integration of a semiconductor device can be improved and an area occupied by the semiconductor device can be decreased without causing degradation of junction voltage resistance and increase of a junction leakage current in the semiconductor device.

Semiconductor device and method of manufacturing the same

A fieldless array includes a semiconductor substrate, a plurality of oxide-nitride-oxide (ONO) structures formed over the upper surface of the semiconductor substrate, and a plurality of word lines formed over the ONO structures, wherein each of the ONO structures is substantially covered by one of the word lines. The word lines (typically polysilicon) block UV irradiation during subsequent processing steps, thereby substantially preventing electrons from being trapped in the silicon nitride layer of the ONO structure. As a result, the threshold voltages of the fieldless array transistors do not severely increase as the width of the fieldless array transistors decrease.

Method of decreasing charging effects in oxide-nitride-oxide (ONO) memory arrays

A plurality of impurity diffusion layers working as bit lines are formed in surface portions of a semiconductor substrate, and a plurality of buried insulating films are formed above the plural impurity diffusion layers on the semiconductor substrate. Gate electrodes of memory devices include a plurality of first polysilicon films, which are formed between the buried insulating films with a trapping film formed below and have top faces at substantially the same level as top faces of the buried insulating films, and a second polysilicon film formed over the plural buried insulating films and the plural first polysilicon films for electrically connecting the plural first polysilicon films to one another.

Semiconductor storage device and its manufacturing method

A first polysilicon film, an ONO film, and a second polysilicon film are deposited on a substrate. After ions of an impurity have been implanted in the second polysilicon film, a silicon oxide is deposited on the substrate, followed by a heat treatment for activating the impurity. Patterning is thereafter performed on the silicon oxide film, the second polysilicon film, the ONO film and the first polysilicon film to from stack cell electrodes and an on-gate protective film. The on-gate protective film formed of a silicon oxide film is densified to have improved resistance to etching. Therefore the desired shape of the on-gate protective film is maintained. The film thickness of sidewalls on side surfaces of the stack cell electrodes is set with stability, so that the reduction in insulation withstand voltage between a contact and a control gate electrode is limited.

Method of manufacturing semiconductor device

An inventive semiconductor memory device includes a memory circuit and a logic circuit that are formed on a single semiconductor substrate. The memory circuit includes a storage element having a memory gate structure. The memory gate structure includes: a tunnel insulating film formed on the substrate; and a control gate electrode formed out of a gate prototype film. The logic circuit includes a logical element having a logic gate structure. The logic gate structure includes: a lower gate electrode formed out of the gate prototype film; and an upper gate electrode formed out of a conductor film on the lower gate electrode. The conductor film contains a metal. The memory gate structure includes no metal films.

Growing community of inventors

Nara, Japan

Masatoshi Arai