Hitachi, Ltd.

Taisho Pharmaceutical Co., Ltd.

Nisshinbo Industries, Inc.

Nec Corporation

Square Enix Co., Ltd.

Meiji Seika Pharma Co., Ltd.

Asahi Fiber Glass Company, Limited

Nichia Chemical Industries, Limited

Sumitomo Mitsui Banking Corporation

Eko Instruments Trading Co., Ltd.

Kawasaki Jukogyo Kabushiki Kaisha

Kabushiki Kaisha Kobe Seiko Sho

Masato Hayashi

Atsushi Shimizu

Satoshi Yoshida

Masanao Yamaoka

Tatsuya Ohno

Tsuyoshi Shibata

Susumu Matsui

Hiroshi Ohta

Shuji Yamamoto

Yoshinori Sekiguchi

Takuya Okuyama

Soichiro Bando

Yasuyuki Kudo

Takeshi Kato

Takashi Oshima

Eiji Takahashi

Chihiro Yoshimura

Shoji Fukuzawa

Yoshiyuki Nakayama

Akihito Akai

Kazuma Yumoto

Naomichi Nonaka

Daisuke Kondo

Goichi Ono

Masato Kashimura

Taketoshi Okubo

Toshihito Kumagai

Kazunari Sakagami

Kaname Araki

Eiki Shitara

Tsutomu Kusaki

Junichi Miyakoshi

Yasuhiko Nagai

Tomoaki Miura

Shugo Takaki

Yasushi Amano

Reishi Naka

Hideaki Ezaki

Yasunori Kujime

Takeshi Kuwada

Yoshiteru Harada

Norihisa Matsumoto

Dai Nozawa

Akito Yasuhara

Keiji Tamura

Haruhisa Ogita

Masanori Hamamatsu

Tomohiro Sugimoto

Kiyotake Morimoto

Shinichi Ochiai

Kenichi Kanemoto

Shigeaki Kinoshita

Kanako Yamamoto

Katsunori Uchimura

Yasunobu Ushiki

Kou Kumura

Mikiya Namura

Yoshihisa Shirasaki

Naoki Sasamoto

Jun Kurosaka

Kumi Abe

Yuko Araki

Xiang-Min Sun

Takeshi Koami

Youichi Shimazaki

Yojiro Kondo

Kazuma Tokuyama

Yukihiro Takatani

Yuri Amada

Yasuhiro Mano

Masaki Mori

Jeremy Lindstrom

Mikihiko Kataoka

Takayuki Tokushige

Yuri Fujisawa

Hideto Sato

Tomohiro Koyama

Toshikazu Hasegawa

Takeshi Aoshima

Kazuya Takeda

Junichi Hosaka

Michihiro Oga

Toshio Yamane

Junnichi Hosaka

Michihiro Ohga

Kazuhisa Tanaka

Koichi Tanigawa

Kenichi Ishidate

Yosinori Hirai

Masayuki Usui

Kazuo Kaneko

Osamu Yamasita

Hidehito Mori

Katsutoshi Higuma

Kiyonori Ugajin

Toshihiko Ayusawa

Takuya Mizuguchi

Fumitaka Kato

Masato Kanou

It is possible to perform a stochastic process based on a metropolis algorithm while reducing a physical quantity of a circuit. Provided is an information processing apparatus including one or a plurality of array circuits. In this apparatus, each of the array circuits includes a plurality of units, and each of the plurality of units includes a first memory that stores a value indicating a state of one node of a coupling model, a second memory that stores a coupling coefficient indicating coupling from a node of another unit connected to an unit of the second memory, and a logic circuit that determines a value indicating a subsequent state of the one node based on a value indicating a state of the node of the other unit and the coupling coefficient. Further, the logic circuit sets a first random variable in accordance with an exponential distribution of a parameter &#x3b8; as an input.

Information processing apparatus and information processing method

A non-transitory computer-readable medium including a program is provided. The program causes a computer connected to an image capturing apparatus to: specify a virtual space; generate a virtual space image obtained by photographing the virtual space including at least one virtual object; output a synthetic image of the captured image and the virtual space image to a display device with a touch panel; determine a content of a user operation against the touch panel; update a position or a posture of each of the virtual camera and the virtual object when the user operation is a first operation in which a touch position against the touch panel does not move after the touch panel is touched; and rotate the virtual object in a predetermined direction when the user operation is a second operation in which the touch position is slid on the touch panel.

Non-transitory computer-readable medium, image processing method, and image processing system for controlling progress of information processing in response to a user operation

A non-transitory computer-readable medium including an image processing program is provided. The image processing program causes a terminal device to: obtain a photographed image obtained by photographing a real space; display a display frame having one or more display areas in a display area of the photographed image in a case where a predetermined condition is satisfied; obtain virtual space information at least containing three-dimensional virtual object information and positional relationship information, the three-dimensional virtual object information regarding one or more three-dimensional virtual objects arranged in a virtual space in advance; and render a certain three-dimensional virtual object viewed behind the display area when the display frame is photographed from the virtual viewpoint in a case where the display frame in the virtual space is virtually photographed from a virtual viewpoint, and display the certain three-dimensional virtual object in the display area of the display frame.

Image processing program, image processing apparatus, and image processing method

An information processing apparatus manufactured at low cost and with ease and that is capable of making a search for a ground state of an arbitrary Ising model. An information processing unit containing a plurality of semiconductor chips, each retains a value of one spin or values of a plurality of spins and simulates interactions among the spins, inter-chip wiring between the necessary semiconductor chips, and a control unit that cause each semiconductor chip to perform interaction computation. The control unit converts data of a problem into data of a lattice-shaped Ising model, which is possibly expressed by the plurality of semiconductor chips, without causing a spin arrangement, in a ground state of an Ising model for the problem, to be changed. The data of the lattice-shaped Ising model is divided for allocation to the plurality of semiconductor chips, and causes each semiconductor chip to perform the interaction computation.

Information processing device and control method therefor

An aspect of the present invention for solving the above problem is a system including a first computer, a control module controlled by the first computer, and a second computer configured to be associated with the control module. The second computer includes a plurality of units, and each of the plurality of units includes a first memory that stores a value indicating a state of a node, a second memory that stores a coefficient, and an arithmetic circuit. The arithmetic circuit performs an arithmetic process of determining a value indicating a state of a node of its own unit, based on a value indicating a state of a node of a different unit and the coefficient of its own unit, and storing the determined value in the first memory. The control module supplies a control signal for controlling the arithmetic process to the second computer.

Information processing acceleration control system

The information processing apparatus is provided with a plurality of spin units for storing spin states and searching for a predetermined state by updating a spin state of a spin unit based on spin states of other spin units. The information processing apparatus includes: a first semiconductor integrated circuit device in which a plurality of first spin units are formed; a second semiconductor integrated circuit device in which a second spin unit is formed; an inter-chip wire connecting the first semiconductor integrated circuit device and the second semiconductor integrated circuit device; and a transmitter connection unit connected to the inter-chip wire and simultaneously shared by the plurality of first spin units. The transmitter connection unit transmits a spin state of a spin unit of which the spin state is changed among the plurality of first spin units, to the second semiconductor integrated circuit device through the inter-chip wire.

Information processing apparatus and semiconductor integrated circuit device

It is very useful for a bank having offices in a plurality of countries to construct a system that enables bank employees in the offices to share information possessed by the offices. None of conventional systems available to the bank employees in all the offices allow appropriate access control to be performed while complying with laws and regulations that vary among the countries, thus enabling appropriate information to be disclosed to appropriate persons. A system, a method, and a program are provided that allow bank employees in a plurality of countries to access shared information in accordance with the roles & responsibilities of the bank employees while complying with laws and regulations in each country.

Access control method, system and storage medium

A semiconductor device is provided with a plurality of semiconductor chips, each of which simulates interactions between nodes of an interaction model, and an inter-chip wire, wherein the plurality of semiconductor chips are used to simulate interactions between nodes of a single interaction model; each semiconductor chip includes a connection unit that sends and receives some of the values indicating the state of the nodes, which are retained by a necessary element unit, via inter-chip wire to and from another semiconductor chip or sends and receives the values indicating state of the nodes, which are retained by the necessary element unit to and from the other semiconductor chip while sharing the inter-chip wire by means of time sharing.

Semiconductor device

A spin unit provided with a memory cell that stores a value of one spin of an Ising model, a memory cell that stores an interaction coefficient from an adjacent spin which interacts with the corresponding spin, a memory cell that stores an external magnetic field coefficient of the one spin and circuits that determine the next state of the one spin on the basis of a product of a value of each adjacent spin and the corresponding interaction coefficient and the external magnetic field coefficient is configured, the semiconductor device is provided with a spin array where the plural spin units are arranged and connected on a two-dimensional plane on a semiconductor substrate, a random number generator and a bit regulator, the bit regulator operates output of the random number generator and supplies a random bit to all spin units in the spin array via one wire.

Semiconductor device and information processing system

A highly-convenient information processing system capable of obtaining a solution of a problem under conditions desired by a user and a management apparatus capable of enhancing the convenience of the information processing system are suggested. An information processing system includes: a host unit equipped with one or more semiconductor chips that execute a ground-state search of an Ising model; and an operation unit that provides a user interface for a user to designate a problem; and a management unit that converts the problem designated by the user by using the user interface into the Ising model and controls the host unit to have the semiconductor chip perform the ground-state search of the converted Ising model; wherein the user can designate a condition for solving the problem by using the user interface; wherein the management unit generates an operating condition of the semiconductor chip according to the condition designated by the user and reports the generated operating condition and the Ising model of the problem designated by the user to the host unit; and wherein the host unit controls the semiconductor chip in accordance with the operating condition reported from the management unit.

Information processing system and management apparatus

An information processing system includes a optimal-load arrangement means containing a load analysis means, a load distribution means, and program information. The load-computation execution means contains a hardware processing means and a software computation means. The program information includes resource information and information pertaining to data to be processed and the content of the processing to be performed thereon. The load analysis means has the ability to perform community assignment in which, of the data to be processed, data in regions having heavy loads and communication volumes that can be reduced is assigned to a hardware community and data in other regions is assigned to a software community. The load distribution means divides up the data to be processed such that the data assigned to the hardware community is processed by the hardware processing means and the data assigned to the software community is processed by the software computation means.

Information processing system and method for distributing load over hardware processing and software processing

A semiconductor device includes a plurality of spin units individually including a memory cell configured to store values of spins in an Ising model, a memory cell configured to store an interaction coefficient from an adjacent spin that exerts an interaction on the spin, a memory cell configured to store an external magnetic field coefficient of the spin, and an interaction circuit configured to determine a subsequent state of the spin. The spin units individually include a random number generator configured to supply the random number to the plurality of the spin units and generate two-valued simulated coefficients of two values or simulated coefficients of three values in performing an interaction to determine a subsequent state of a spin of the spin units from a value of a spin from an adjacent spin unit, an interaction coefficient, and an external magnetic field coefficient.

In a semiconductor device which calculates an interaction model, a technique capable of executing interaction calculation in non-synchronization with a clock is provided. The semiconductor device includes a plurality of units each of which includes: a first memory cell for storing a value indicating a state of one node of an interaction model; a second memory cell for storing an interaction coefficient indicating an interaction from a node connected to the one node; and an interaction calculation circuit for determining a value indicating a next state of the one node based on a current determined by a value indicating a state of the connected node and the interaction coefficient.

Semiconductor system for implementing an ising model of interaction

A semiconductor device capable of easily and properly detecting a defective element unit(s) and a quality management method for the semiconductor device are suggested. A semiconducting device simulating interactions between nodes in an interaction model is equipped with a quality management unit for managing the quality of each element unit provided corresponding to each node, wherein the quality management unit executes a specified quality test of each element unit, compares test results of the quality test with pre-given results to be obtained from the quality test, and detects a defective memory cell(s) and a defective element unit(s) based on the comparison results.

Semiconductor device and its quality management method

An object of the present invention is to realize an example of configuration that approximately represents a state of quantum spin in a semiconductor device where components as a basic configuration unit are arrayed so as to search a ground state of Ising model. There is disclosed a semiconductor device provided with plural units each of which is equipped with a first memory cell that stores a value which represents one spin of the Ising model by three or more states, a second memory cell that stores an interaction coefficient showing interaction from another spin which exerts interaction on the one spin and a logical circuit that determines the next state of the one spin on the basis of a function having a value which represents a state of the other spin and the interaction coefficient as a constant or a variable.

Growing community of inventors

Tokyo, Japan

Masato Hayashi