Nec Corporation

Masato Edahiro

Hiroaki Inoue

Junji Sakai

Tsuyoshi Abe

Yoshiyuki Ito

Masaki Uekubo

Noriaki Suzuki

Sunao Torii

Masamichi Takagi

Tetsuya Minakami

Yoshiko Yamashita

Yoshimi Onoma

For flexibly setting up an execution environment according to contents of processing to be executed while taking stability or a security level into consideration, the multiple processor system includes the execution environment main control unitwhich determines CPU assignment at the time of deciding CPU assignment, the execution environment sub control unitwhich controls starting, stopping and switching of an execution environment according to an instruction from the execution environment main control unitto synchronize with the execution environment main control unit, and the execution environment management unitwhich receives input of management information or reference refusal information of shared resources for each CPUor each execution environmentto separate the execution environment main control unitfrom the execution environment sub control unitsthrough, or the execution environment sub control unitsthroughfrom each other.

System structuring method in multiprocessor system and switching execution environment by separating from or rejoining the primary execution environment

Disclosed is an automatic optimization system capable of searching for an allocation with a good performance from among a plurality of task allocations which can be scheduled in a system of a development target configured with a plurality of periodic tasks. A task allocation optimization system for a multi-core processor including a plurality of cores calculates a response time of each of a plurality of tasks which are core allocation decision targets, and outputs an accumulative value of the calculated response time as an evaluation function value which is an index representing excellence of a task allocation. A task allocation from which a good evaluation function value is calculated is searched based on the evaluation function value. A candidate having a good evaluation function value among a plurality of searched task allocation candidates is held.

Real time system task configuration optimization system for multi-core processors, and method and program

Provided is the information communication processing device capable of executing terminal function switching control in linkage with an external communication content on one information communication processing device based on the external communication content without a problem in switching. The information communication processing device has at least one information processing device having a plurality of function environments for executing an application, and a switching control unit for switching a function environment, in which the switching control unit determines a function environment to be switched based on contents of communication with the outside of the information communication processing device and sets context of the function environment to be switched at context of a function environment being executed, thereby executing switching to the function environment to be switched.

Information communication processing device, information communication terminal, information communication system, function switching method and function switching program

A device and a method are provided for increasing processing speed and for ensuring system security when an application or a driver is added. The device includes a first CPU group that executes software composed of basic processing and an OS; a second CPU group that executes software composed of additional processing and OS corresponding to the additional processing, inter-processor communication means used for communication between the first CPU and the second CPU, and access control means that controls access made by the second CPU to a memory and/or an input/output device.

Information communication device and program execution environment control method

A parallel sorting apparatus is provided whose sorting processing is speeded up. A reference value calculation section calculates a plurality of reference values serving as boundaries of intervals used for allocating input data depending on the magnitude of a value. An input data aggregation section partitions the input data into a plurality of input data regions, and calculates, by parallel processing, mapping information used for allocating data in each of the partitioned input data regions to the plurality of intervals that have boundaries on the reference values calculated by the reference value calculation section. A data allocation section allocates, by parallel processing, data in each of the input data regions to the plurality of intervals in accordance with the mapping information calculated by the input data aggregation section. An interval sorting section individually sorts, by parallel processing, data in the plurality of intervals allocated by the data allocation section.

Parallel sorting apparatus, method, and program

A semiconductor integrated circuit of the invention comprises a plurality of cores, and an interconnecting network including adaptors connected to each of the cores and a plurality of routers connecting the adaptors to communicate therebetween. Transmission side adaptors store first delivery information, and control delivery of the request signal to be received from the first core in accordance with the first delivery information. Reception side adaptors store second delivery information, and control delivery of the request signal to be received through the interconnecting network to the second core in accordance with the second delivery information. The first delivery information and the second delivery information are hierarchically set.

Semiconductor integrated circuit and filter control method

Provided is an information processing device which enables transfer of an execution environment in a short time period without degrading basic performance of an execution environment and without requiring a large amount of memory. The information processing device comprises a basic side CPUfor executing basic processing and an addition side CPUfor executing additional processing, in which a transfer management unitprovided on the basic side CPUtransfers execution environment dataincluding constitution information of an execution environmentof the additional processing to be executed on the addition side CPU and data in a memory corresponding to the execution environment to other information processing device and restores the execution environment to re-start the addition side CPU based on the received execution environment data

Information processing apparatus, execution environment transferring method and program thereof

On a parallel processing system by an OS for single processors which operates, on a multiprocessor, an OS for single processors and an existing application to realize parallel processing by the multiprocessor with respect to the application, each processor includes a communication proxy unit which transfers data between tasks spreading over the processors by proxy and the communication proxy unit on a processor in which a task on a transmission side operates holds information about an address, on a processor, of a task on a reception side to receive data transferred from the task on the transmission side as proxy for the task on the reception side.

Parallel processing system running an OS for single processors and method thereof

A semiconductor integrated circuit of the invention comprises a plurality of cores, and an interconnecting network including adaptors connected to each of the cores and a plurality of routers connecting the adaptors to communicate therebetween. The adaptors keep delivery information indicating a delivery condition of a request signal received from the cores and control delivery of the request signal received from the cores in accordance with the delivery information.

Semiconductor integrated circuit and filter and informational delivery method using same

The information processing device which recovers a domain developing a fault caused by added application and device driver while maintaining security and reliability includes a plurality of processors, wherein the plurality of processors form a plurality of domains according to processing contents to be executed, and the processors in different domains communicate with each other through a communication unit, and which further includes a recovery unit for executing, for a domain developing a fault, failure recovery processing based on a failure recovery request notified by the domain and a recovery condition set in advance for each domain.

Information processing device comprising a plurality of domains having a plurality of processors, recovery device, program and recovery method

In a parallel processing system by an OS for single processors which operates an OS for single processors and an existing application for single processors on a multiprocessor to realize parallel processing by the multiprocessor with respect to the application, with the multiprocessor being logically divided into two groups of a first processor side and a second processor side, a unit of work that can be parallelized within the application operating on a processor on the first processor side is controlled as a new unit of work on a processor on the second processor side.

Parallel processing system by OS for single processors and parallel processing program

On a parallel processing system which operates an OS and an existing application for single processors on a multiprocessor to realize parallel processing by the multiprocessor with respect to the application, an OS service unit which provides services of the OS for single processors to a unit of work which can be parallelized within the application controls security function with respect to a processing request from the unit of work in response to the processing request.

Security management system in parallel processing system by OS for single processors

In the application parallel processing system, on specific one of processors forming a multi-processor, an application is operated independently of other processors and on other processors, a function expansion module is operated in parallel processing under control of the application. As a result, even in such a data processing device internally provided with a processor whose processing capacity is small as a portable terminal, applications can be operated smoothly.

Application parallel processing system and application parallel processing method

The present invention relates to a parallel processing system by an OS for single processor capable of operating an OS for single processor and an existing application on a multiprocessor and achieving parallel processing by a multiprocessor with respect to the application, wherein the multiprocessor are logically divided into two groups, i.e., a first processor side and a second processor side, and units of work that are parallelizable within the application operating on the processors on the first processor side are controlled as new units of work on the processors on the second processor side.

Parallel processing system by OS for single processor

In a parallel processing system by an OS for single processors which operates an OS and an existing application for single processors on a multiprocessor to realize parallel processing by the multiprocessor with respect to the application, a processor on a first processor side receives a request for activating or stopping a processor from a unit of work on any of the processors and controls a power supply management device of the OS for single processors to conduct activation or stop of the requested processor, while the processor requested to be activated or stop executes processing necessary for the activation or stop based on a notification from the first processor side.

Growing community of inventors

Tokyo, Japan

Masato Edahiro