Hitachi, Ltd.

Hitachi Communication Systems, Inc.

Masataka Takano

Setsuo Takahashi

Akihiko Takase

Junichirou Yanagi

Kaoru Aoki

Tetsushi Nakano

Miho Iino

Yoji Oka

Noboru Endo

Yasushi Fukuda

Toshihide Fujio

An ATM path changing system and method for use in an ATM communication apparatus and ATM communication network are provided which can set an alternating route in the event of a failure occurring in a transmission line or VP. A header converter in a line controller includes a plurality of output path routing tables, a selector, a comparator, a register for failure RTG and a register for failure VPI and when the contents of the register for failure RTG or VPI coincides with a RTG or VPI of the output path routing tables, an output is selected in accordance with the contents of a selected emergency-route RTG or VPI register.

Path changing system and method for use in ATM communication apparatus

An ATM switching system at each node of a network performs route changing or rerouting promptly when a failure occurs. In each of ATM switching systems at nodes N1 to N6: a route table 21 of a line interface 102 is set with conversion header information of a normal route, and an alternate routing table 25 is set with header information of one or more alternate routes. Subsequently, each line interface tests, when a packet arrives, whether or not a failure has occurred in an output line involved in the normal route, by referring to a bitmap 264 storing failure lines and a VP failures. The line interface executes header conversion by applying the normal header information stored in the routing table 21 in the case of no failure set for the normal route and by applying the header information stored in the alternate routing table 25 in case a failure has occurred on the normal route, and then outputs the packet to an ATM switch 101. Since the alternate route is promptly selected at the time of a failure of a net line and not in response to decoding a header of a received packet, the number of packets discarded due to the failure is reduced, and the rerouting operation is promptly executed even in the case of multiple failures.

Aim switching system and path changing method

An ATM communication system including a plurality of communication nodes connected in a loop form by buses, buffers disposed in each communication node, a synchronizing pulse generation circuit for conducting cell demultiplexing of all communication nodes at the same timing, storage devices disposed in each communication node to store mounting position information of the communication node and slot generator position information, and a circuit used by each communication node to automatically transmit and receive cells on the basis of position information described above.

ATM communication system

A bus type clock supplying system in a communication system with master-slave synchronization includes communication cards connected with transmission lines within a communication system and a clock bus. Each communication card includes a clock supplying section including a frequency divider for extracting a clock from the transmission lines and a tri-state device outputting the clock to the clock bus; a clock receiving section including a clock selector for selecting one clock from a plurality of the bus-type clock lines, and a frequency multiplier for multiplying the frequency of the selected clock; and a monitoring and controlling section having a function of monitoring interruption of clock input, abnormalities in the frequency multiplier, etc., and a function of controlling the tri-state device and the clock selector.

Bus type clock supplying system for providing a clock in a communication

ATM communication system having a physical loop form with logical start

A switching system which includes subscriber's circuit device connected to terminals and a subscriber's circuit controlling apparatus between a host apparatus and subscriber's circuit devices for controlling the subscriber's circuit devices in accordance with a control order corresponding to control information from the host apparatus. Each of the subscriber's circuit controlling apparatuses includes an order processing unit which analyzes control information which is transmitted from the host apparatus for comparing the received control information with last received control information and transmits a control order to the subscriber's circuit devices. The order processing unit transmits control orders a number of times to the subscriber's circuit devices and accepts a fault report, from the subscriber's circuit devices to retransmit a control order. The subscriber's circuit devices receive the control order a number of times for collating the control orders and outputs a fault report when in disagreement.

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Yokohama, Japan

Masataka Takano