Fujitsu Corporation

Fujitsu Semiconductor Limited

Masataka Mizukoshi

Kanae Nakagawa

Kazuaki Kurihara

Takeshi Shioga

Yasuo Yamagishi

Yoshikatsu Ishizuki

Junichi Kasai

Masashi Takenaka

Taiji Sakai

Masaharu Minamizawa

Koki Otake

Taturou Yamashita

John David Baniecki

Toshio Hamano

Michio Sono

Nobuhiro Imaizumi

Kazuo Teshirogi

Makoto Iijima

Ichiro Yamaguchi

Tetsushi Wakabayashi

Akira Takashima

Masayuki Ochiai

Eiji Yoshida

Nobuo Kamehara

Yuji Awano

Toshiyuki Motooka

Kazuhiko Mitobe

Tatsuharu Matsuda

Takao Ohno

Hidefumi Ueda

Shigeyuki Maruyama

Hirohisa Matsuki

Seiki Sakuyama

Eiji Watanabe

Mitsutaka Sato

Takao Nishimura

Makoto Haseyama

Tetsuya Fujisawa

Taisuke Iwai

Koji Omote

Keishiro Okamoto

Hiroshi Yoshimura

Futoshi Fukaya

Mitsuhisa Watanabe

Katsuhiro Hayashida

Yoshito Akutagawa

Hiroyuki Matsui

Masahiko Ishiguri

Kunio Kodama

Koji Sawahata

Masahiro Yoshikawa

Hiroyoshi Tomita

Masatoshi Ishii

Yasurou Matsuzaki

Osamu Taniguchi

Masao Nakano

Yutaka Yamada

Nobuyuki Hayashi

Teru Nakanishi

Yasuhiro Fujii

Yuzo Shimobeppu

Kazuhiro Yoshimoto

Makoto Yanagisawa

Shinnosuke Kamata

Yoshiaki Shinjo

Fumihiko Taniguchi

Nawalage Florence Cooray

Hidehiko Akasaki

Shigeki Harada

Joji Fujimori

Motoshu Miyajima

Masaru Nukiwa

Toyonobu Yamada

Tomoji Nakamura

Masami Matsuoka

Susumu Abe

Kosuke Otokita

Takao Akai

Yuuji Watanabe

Tatsuro Yamashita

Syuichirou Takahasi

Kousuke Otokita

Teiichi Endo

Akiyo Mizutani

A semiconductor substrate is secured by suction to a rear face of a supporting face of a substrate supporting table. In this event, the thickness of the semiconductor substrate is made fixed by planarization on the rear face, and the rear face is forcibly brought into a state free from undulation by the suction to the supporting face, so that the rear face becomes a reference face for planarization of a front face. In this state, a tool is used to cut surface layers of Au projections and a resist mask on the front face, thereby planarizing the Au projections and the resist mask so that their surfaces become continuously flat. This can planarize the surfaces of fine bumps formed on the substrate at a low cost and a high speed in place of CMP.

Method for forming bumps, semiconductor device and method for manufacturing same, substrate processing apparatus, and semiconductor manufacturing apparatus

Electrodes formed in a partial surface area of a semiconductor substrate and distal ends of conductive nanotubes bristled on a surface of a growth substrate, are bombarded with rare gas plasma. The distal ends of the conductive nanotubes bombarded with the rare gas plasma are brought into contact with the electrodes bombarded with the rare gas plasma to fix the conductive nanotubes to the electrodes. The growth substrate is separated from the semiconductor substrate in such a manner that the conductive nanotubes fixed to the electrodes remain on the electrodes formed on the semiconductor substrate.

Manufacture method for semiconductor device with bristled conductive nanotubes

A method of manufacturing an electronic component includes forming a resin layer over an underlying layer, pressing a conductor plate including a pattern formed on one major surface thereof against the resin layer, and embedding the pattern in the resin layer, and performing polishing, Chemical Mechanical Polishing, or cutting by the use of a diamond bit on another major surface of the conductor plate until the resin layer appears, and leaving the pattern in the resin layer as a conductor pattern.

Ferroelectric component and manufacturing the same

A method for manufacturing an interposer including forming a capacitor over a semiconductor substrate; forming a first resin layer with a first partial electrode buried in over the semiconductor substrate and the capacitor; cutting an upper part of the first partial electrode and the first resin layer with a cutting tool; forming a second resin layer with a second partial electrode buried in over a glass substrate with a through-electrode buried in; cutting an upper part of the second partial electrode and the second resin layer with the cutting tool; making thermal processing with the first resin layer and the second resin layer adhered to each other while connecting the first partial electrode and the second partial electrode to each other; removing the semiconductor substrate; forming a third resin layer over the glass substrate, covering the capacitor; and burying a third partial electrode in the third resin layer.

Method for manufacturing interposer

A method of manufacturing a semiconductor device includes: forming a first layer including crystals by processing a surface of a first electrode of a semiconductor element; forming a second layer including crystals by processing a surface of a second electrode of a mounting member on which the semiconductor element is mounted; reducing a first oxide film present over or in the first layer and a second oxide film present over or in the second layer at a first temperature, the first temperature being lower than a second temperature at which a first metal included in the first electrode diffuses in a solid state and being lower than a third temperature at which a second metal included in the second electrode diffuses in a solid state; and bonding the first layer and the second layer to each other by solid-phase diffusion.

Method of manufacturing semiconductor device

A semiconductor package is disclosed that includes a semiconductor device; a circuit board; and a connection mechanism including a first conductive terminal provided on the semiconductor device, and a second conductive terminal provided on the circuit board side, the connection mechanism electrically connecting the semiconductor device and the circuit board via the first conductive terminal and the second conductive terminal. At least one of the first conductive terminal and the second conductive terminal of the connection mechanism includes one or more carbon nanotubes each having one end thereof fixed to the surface of the at least one of the first conductive terminal and the second conductive terminal, and extending in a direction away from the surface. The first conductive terminal and the second conductive terminal engage each other through the carbon nanotubes.

Semiconductor package and method of manufacturing the same

A semiconductor device is provided that forms a three-dimensional semiconductor device having semiconductor devices stacked on one another. In this semiconductor device, a hole is formed in a silicon semiconductor substrate that has an integrated circuit unit and an electrode pad formed on a principal surface on the outer side. The hole is formed by etching, with the electrode pad serving as an etching stopper layer. An embedded electrode is formed in the hole. This embedded electrode serves to electrically lead the electrode pad to the principal surface on the bottom side of the silicon semiconductor substrate.

Semiconductor device suitable for a stacked structure

The plating method comprises the step of forming a resin layerover a substrate; the step of cutting the surface part of the resin layerwith a cutting tool; the step of forming a seed layeron the resin layerby electroless plating; and the step of forming a plating filmon the seed layerby electroplating. Suitable roughness can be give to the surface of the resin layer, whereby the adhesion between the seed layerand the resin layercan be sufficiently ensured. Excessively deep pores are not formed in the surface of the resin layeras are by desmearing treatment, whereby a micronized pattern of a photoresist filmcan be formed on the resin layer. Thus, interconnections, etc. can be formed over the resin layerat a narrow pitch with high reliability ensured.

Plating method, semiconductor device fabrication method and circuit board fabrication method

The electronic device comprises a first substratewith an electric circuit element formed in a predetermined region of one primary surface, a second substrateformed, opposed to said one primary surface of the first substrate, sealing portionsformed between the first substrateand the second substrate, enclosing the predetermined region of the first substrate, and an adhesion layerformed on the side surfaces of the sealing parts. The adhesion layer is formed on the side surfaces of the first sealing structureon the side of the first substrateand the second sealing structureon the side of the second substrate, whereby when the first sealing structureand the second sealing structureare bonded to each other, the adhesion between the first sealing structureand the second sealing structurecan be sufficiently ensured.

Electronic device and method for fabricating the same

The plating method comprises the step of forming a resin layerover a substrate; the step of cutting the surface part of the resin layerwith a cutting tool; the step of forming a seed layeron the resin layerby electroless plating; and the step of forming a plating filmon the seed layerby electroplating. Suitable roughness can be give to the surface of the resin layer, whereby the adhesion between the seed layerand the resin layercan be sufficiently ensured. Excessively deep pores are not formed in the surface of the resin layer, as are by desmearing treatment, whereby a micronized pattern of a photoresist filmcan be formed on the resin layer. Thus, interconnections, etc. can be formed over the resin layerat a narrow pitch with high reliability ensured.

The interposer includes a glass substratewith first through-electrodesburied in; a plurality of resin layerssupported by the glass substrate; thin film capacitorsburied between a first resin layerof the plural resin layers and a second resin layerof the plural resin layers and including the first capacitor electrodes, the second capacitor electrodesopposed to the first capacitor electrodes, and a dielectric thin filmof a relative dielectric constant of 200 or above formed between the first capacitor electrodeand the second capacitor electrode, and the second through-electrodespenetrating the plural resin layers, electrically connected to the first through-electrodeand electrically connected to the first capacitor electrodeor the second capacitor electrode

Interposer and method for manufacturing the same

As for electrode pads for a semiconductor integrated circuit element, some of electrode pads for signal transmission are coupled to Ti films. Others of the electrode pads for signal transmission are coupled to electrode pads through wiring routed in multilayer wiring. Electrode pads for power supply are coupled to electrode pads to which power lines at potentials different from each other are coupled through wiring. The electrode pads are also coupled to Al foils (anodes). Electrode pads for grounding are coupled to electrode pads to which ground lines are coupled through wiring. The electrode pads are also coupled to conductive polymer films (cathodes).

Method for manufacturing capacitor embedded in interposer

The present invention realizes a semiconductor device of high reliability which allows metal terminals which have a uniform height, are flat and smooth to be formed under low load and at low costs and to be mounted with low damage. The electrodesand the insulating filmare both formed of materials having the property that they are solid and do not exhibit the adhesiveness at room temperature and exhibit the adhesiveness at a temperature not lower than a first temperature and cure at a temperature not lower than a second temperature higher than the first temperature. The surfaces of the electrodesand the insulating filmof a semiconductor chipare planarized in continuously flat with a hard cutting tool, as of diamond or others.

Method for processing a base that includes connecting a first base to a second base

Growing community of inventors

Kawasaki, Japan

Masataka Mizukoshi