Renesas Electronics Corporation

Nec Electronics Corporation

Renesas Electronic Coporation

Masashige Moritoki

Hiromi Sasaki

Tomotake Morita

Takashi Ogura

Kenichi Yamamoto

Takamasa Itou

Keiji Sakamoto

Hiroaki Tomimori

Hiroyuki Kunishima

Youichi Yamamoto

Toshiji Taiji

Kouichi Konishi

Shigeaki Shimizu

Kousei Ushijima

Katsuro Tateyama

Tsutomu Himukai

Takashi Shimane

Kazumi Saito

To improve performance of a semiconductor device. Over a semiconductor substrate, a gate electrode is formed via a first insulating film for a gate insulating film, and a second insulating film extends from over a side wall of the gate electrode to over the semiconductor substrate. Over the semiconductor substrate in a part exposed from the second insulating film, a semiconductor layer, which is an epitaxial layer for source/drain, is formed. The second insulating film has a part extending over the side wall of the gate electrode and a part extending over the semiconductor substrate, and a part of the semiconductor layer lies over the second insulating film in the part extending over the semiconductor substrate.

Semiconductor device and method of manufacturing the same

Dishing of a plate of a capacitor is suppressed in a structure where the top of the plate is flush with a top of an interconnection. Double interlayer dielectric films are used to form a first recess and a second recess. The second recess has an opening on the bottom of the first recess. The first and second recesses are used to form a capacitor. The lower electrode of the capacitor has a bottom part along the bottom of the first recess. The lower electrode further includes a sidewall part having an upper end that projects along a side face of the second recess from the opening of the second recess up to a position between the opening of the second recess and a top of the upper interlayer dielectric film (the upper one of the double interlayer dielectric films).

Semiconductor device with epitaxial semiconductor layer for source/drain on substrate, and method of manufacturing the same

To provide a structure of a semiconductor device that realizes an increase in a capacitor capacitance of a memory circuit to the maximum while inhibiting an increase in a contact resistance of a logic circuit, and a manufacture method thereof. When designating the number of layers of the local interconnect layers having wiring that makes up a logic circuit area as M and designating the number of layers of the local interconnect layers having wiring that makes up the memory circuit as N (M and N are natural numbers and satisfy M&#x3e;N), capacitance elements are provided over the interconnect layers comprised of (M&#x2212;N) layers or (M&#x2212;N+1) layers.

Semiconductor device and method for manufacturing the same

A semiconductor deviceincludes: a silicon substrate; a first gateincluding a gate electrodeformed on the silicon substrateand sidewallsformed on the sidewalls of the gate electrode; a silicide layerformed lateral to the sidewallsof the first gateon a surface of the silicon substrate; and a contactwhich overlaps at least partially in plan view with the first gateand reaches to the silicide layerof the surface of the silicon substrate; wherein an insulator film is located between the contactand the gate electrodeof the first gate

Manufacturing method of semiconductor device having self-aligned contact connected to silicide layer on substrate surface

A method of manufacturing a semiconductor device includes a process of forming a STI trench in a substrate, a process of forming a thermal oxide film on a sidewall and a bottom surface of the STI trench, a process of performing a plasma treatment on a surface of the thermal oxide film that is located at a bottom portion of the STI trench, and a process of forming an insulating film in the STI trench using a CVD method.

Method of manufacturing semiconductor device

Photoresist on a metal is removed with less oxidation of the metal surface by the invented ashing. During process, the matching of oxygen gas ratio and wafer temperature under downstream plasma which means no RF bias plasma is controlled for oxidation amount not to depend on ashing time with required photo resist rate in manufacturing.

Method of fabricating semiconductor device

An increase of the via resistance resulted due to the presence of the altered layer that has been formed and grown after the formation of the via hole can be effectively prevented, thereby providing an improved reliability of the semiconductor device. A method includes: forming a TiN film on the semiconductor substrate; forming an interlayer insulating film on a surface of the TiN film; forming a resist film on a surface of the interlayer insulating film; etching the semiconductor substrate having the resist film formed thereon to form an opening, thereby partially exposing the TiN film; plasma-processing the exposed portion of the TiN film to remove an altered layer formed in the exposed portion of the TiN film; and stripping the resist film via a high temperature-plasma processing.

Method for manufacturing semiconductor device to form a via hole

A semiconductor device having good production stability and excellent in a contact property between an antireflection film on an Al contained metal film and a conductive plug. The device includes a substrate, an insulating interlayer, and a multi-layer structure. The insulating interlayer is formed in the upper portion of the substrate. The structure is provided on the insulating interlayer. A Ti film, a first TiN film, an AlCu film, a Ti film, a second TiN film, and an etching adjustment film are sequentially formed in the structure. The device includes an insulating interlayer and a conductive plug. The insulating interlayer is provided on the insulating interlayer and the structure. The conductive plug penetrates the insulating interlayer and the etching adjustment film, and an end surface of the conductive plug is located in the second TiN film. The conductive plug includes a Ti film, a TiN film, and a W film.

Growing community of inventors

Kanagawa, Japan

Masashige Moritoki