Hitachi, Ltd.

Other

Hitachi Chemical Company, Ltd.

Masashi Miyazaki

Akio Takahashi

Haruo Akahoshi

Mineo Kawamoto

Masao Suzuki

Tokihito Suwa

Satoru Amou

Toshiaki Ishimaru

Shiro Kobayashi

Mitsuo Yokota

Hiroyuki Fukai

Masanori Nemoto

Shozo Nohara

Kenzi Kikuta

Yuichi Satsu

Takeyuki Itabashi

Shin Nishimura

Toshinari Takada

Rituji Toba

Masatoshi Narahara

Satoru Amo

Fujiko Yutani

A multilayer circuit board having a resolution in the range of 25-80 &mgr;m, and blind via-holes between layers, the blind via-holes having an aspect ratio in the range of 2.0-0.6 for effecting access between the layers, wherein an insulating layer having the blind via-holes between the layers has a glass transition temperature in the range of 150-220&deg; C., and an epoxy group photosensitive resin composition is used therefor. A photosensitive resin composition having a preferable resolution and heat resistance is obtained. A multilayer circuit board is provided in which the thermal stress generated in the steps of a reflow process, a gold wire bonding process and a repairing process in a bare chip mounting process are reduced, and peeling off of the conductor wiring and deformation of the multilayer circuit board caused by mechanical stresses during the heating processes are suppressed. Accordingly, a decrease in the size and weight of an electronic apparatus is possible.

Multilayer circuit board having insulating layer with via-holes

Photosensitive resin composition, and multilayer printed circuit board using the same

In an additive process for producing printed wiring boards, by using a developer comprising a chlorine-free organic solvent and an alkaline aqueous solution and as a resist material a copolymer of methacrylic acid and methyl methacrylate or the like, the production steps are simplified even if a substrate having a large area is used, and abolishment of chlorine-containing organic solvent as a developer becomes possible.

Process for producing printed wiring board

A multilayer circuit board having a resolution in the range of 25-80 .mu.m, and blind via-holes having an aspect ratio in the range of 2.0-0.6 for effecting access between the layers, wherein an insulating layer between said layers having the blind via-holes has a glass transition temperature in the range of 150-220.degree. C., and an epoxy group photosensitive resin composition is used therefor. A photosensitive resin composition having a preferable resolution and heat resistance is obtained. A multilayer circuit board is provided in which the thermal stress generated in the steps of a reflow process, a gold wire bonding process and a repairing process in a bare chip mounting process was reduced, and peeling off of the conductor wiring and deformation of the multilayer circuit board caused by mechanical stresses during the heating processes were suppressed. Accordingly, a decrease in the size and weight of an electronic apparatus is possible.

Multilayer circuit board and photosensitive resin composition used

A method for manufacturing printed circuit board by forming wiring pattern by chemical metal plating using a negative pattern made of a photosensitive resin composition layer as the plating resist, wherein the photosensitive resin comprises at least a linear high polymer composed of repeating units expressed by the following general formula (1); ##STR1## where, R.sub.1 is H, an alkyl group having 1-9 carbon atoms, an alkoxy group having 1-9 carbon atoms, and a carboxyalkyl group having 1-9 carbon atoms, R.sub.2 is an alkylene group having 1-9 carbon atoms, and n is the polymerized number of the repeating unit, and an organic compound expressed by the following general formula (2); ##STR2## where, R.sub.3 is H or an alkyl group having 1-6 carbon atoms, X is NH or S, and Z is N or C--Y, where Y is H, NH.sub.2, or SH.

Method for manufacturing printed circuit board

A process is provided for the formation of a conductive circuit pattern on a base metal formed on a substrate. On the base metal, a plating resist is first provided in a pattern corresponding to the circuit to be formed and a circuit pattern is then formed by plating. The plating resist is treated with a stripper and then with a stripping residue remover to cut off chemical bonds in the resist by a dehydrating decomposition reaction. The base metal is treated with an etchant for the base metal, whereby any resist residue still remaining after the treatment with the stripping residue remover is removed and the base metal are etched at areas which were covered by the plating resist.

Process for the formation of a conductive circuit pattern

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Hadano, Japan

Masashi Miyazaki