Cypress Semiconductor Corporation

Masashi Kijima

Rajiv Singh

Hiroyuki Matsunami

Satoru Mizuta

Tsutomu Tanii

David Goniodsky

A noise-shaping successive-approximation register (SAR) analog-to-digital converter (ADC) (SAR ADC) including a noise-shaping (NS) filter, a comparator, a differential input path between the NS filter and the comparator, and a cross-coupled set of capacitive elements coupled to the differential input path.

Noise shaping successive-approximation register (SAR) analog-to-digital converter (ADC)

Systems, methods, and devices enhance management of components used in data converters. Methods include receiving an input at a data converter comprising a digital to analog converter (DAC), the digital to analog converter comprising a plurality of sensing elements, and performing, using the DAC, a first conversion operation based on the input and a first set of the plurality of sensing elements identified by a first pointer value. Methods also include determining a pointer increment value based, at least in part, on an output of the first conversion operation and a hysteresis threshold value, the pointer increment value being used to determine an amount by which the first pointer value is incremented, the hysteresis threshold value identifying a threshold for determination of the pointer increment value.

Systems, methods, and devices for data converter management

In an example embodiment, an analog-digital converter includes digital-analog converter, a comparator, and a register. The digital-analog converter is configured to output a differential voltage between a reference voltage and a voltage of an analog signal. The comparator is configured to output a comparison signal corresponding to the differential voltage output by the digital-analog converter. The register is configured to cause the digital-analog converter to generate N pairs of differential voltages (N&#x2267;1), to cause the digital-analog converter to generate an (N+1)pair of differential voltages by causing one of a positive side and a negative side of the digital-analog converter to output an (N+1)differential voltage and causing the other of the positive side and the negative side to output a differential voltage equal to the Ndifferential voltage as an (N+1)differential voltage, and to output a digital signal corresponding to a comparison signal having a smallest voltage among (N+1) comparison signals.

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Aichi, Japan

Masashi Kijima