Kabushiki Kaisha Toshiba

Mimaki Engineering Company, Ltd.

Masashi Hirano

Akihiro Onodera

Shigeyuki Hayakawa

Toshihiro Sanuki

Takeshi Yoshida

Tadashi Miyazaki

Tsutomu Fukasawa

Hidehiko Yasuta

Tsutomu Okano

Taito Sakai

Masaharu Katsuta

An ink jet printer that performs printing on the three-dimensional object using an ink jet scheme is provided, the printer includes an ink jet head, and a print object retaining section, the print object retaining section includes a first shaft, a second shaft, a third shaft, and a rotation driving section, a distance between the first shaft and the second shaft is larger than a distance between the first shaft and the third shaft, and in a case of performing printing on a three-dimensional object having a cylindrically shaped portion, the print object retaining section retains the three-dimensional object by mounting the cylindrically shaped portion on the first shaft and the second shaft, or on the first shaft and the third shaft, and the rotation driving section causes the three-dimensional object to rotate by causing at least the first shaft to rotate.

Ink jet printer and print method

An ink-jet printer is provided and includes: a motor, generating a driving force that prompts an ink-jet head moving in a main scanning direction relative to a print object; a motor, generating a driving force by which the ink-jet head is moved; a motor pulley, being rotated by the driving force generated by the motor; a first belt wound around the motor pulley to transmit the driving force from the motor pulley toward the ink-jet head; and a decelerating pulley on which the first belt is wound around to be rotated by the driving force transmitted on the first belt. At least one of a group of motor-side teeth of the motor pulley and belt-side teeth of the first belt and a group of deceleration-side teeth of the decelerating pulley and the belt-side teeth of the first belt is a combination of intermeshable spur gear teeth and helical gear teeth.

Ink-jet printer

According to an embodiment, a traversing incore probe valve support has: a valve bed fixed to a traversing incore probe valve provided in a traversing incore probe guide tube extending to outside of a reactor containment vessel; a stand provided on a floor surface outside the reactor containment vessel; and a displacement allowing member that connects the stand and valve bed in such a manner that they can be displaced in an axial direction of the traversing incore probe guide tube. The displacement allowing member may include: a lower slide rail fixed to the stand valve bed and having an upward contact surface; and an upper slide rail fixed to the valve bed and having a downward contact surface that can be slid in the axial direction of the traversing incore probe guide tube while contacting the upward contact surface.

Traversing incore probe valve support and traversing incore probe system

An ink jet printer that appropriately performs printing with high accuracy on a three-dimensional object for a portable terminal is provided. The ink jet printer includes an ink jet head that discharges ink droplets, and a print object retaining section that retains a three-dimensional objects. The print object retaining section includes a shaft member extending in a direction perpendicularly intersecting a discharging direction of the ink droplets, a housing section being a shaft retaining section that retains the shaft member in a rotatable manner, a work set member being a three-dimensional object fixing member that is a fixing member fixing the three-dimensional objects relative to the shaft member, and causes the three-dimensional objects to rotate together with the shaft member by being fixed relative to the shaft member, and a rotation driving section being a rotation stopping means for stopping rotation of the shaft member at a predeterminedly set position.

Ink jet printer, print object retaining member, and print method

When printing on 3-dimensional objects such as covers for handheld terminals, generation of stray light may be adequately suppressed. There is provided an ink jet printer including an ink jet head, an ultraviolet irradiating portions, and an object-to-be-printed holding member, wherein the object-to-be-printed holding member includes a 3-dimensional object holding portion configured to hold a 3-dimensional object, and a light-shielding portion, the 3-dimensional object holding portion changes an orientation of the 3-dimensional object to bring a first surface to be printed and a second surface to be printed respectively to oppose the ink jet head, the light-shielding portion is provided so as to be capable of advancing and retracting in a direction of discharge at least at some position, and changes a shielding area that shields ultraviolet rays in a direction orthogonal to the direction of discharge.

Ink jet printer, object-to-be-printed holding member, and printing method

A flip flop circuit includes a first latch circuit which latches an input data at a leading edge of a clock signal, a second latch circuit which latches the input data at a trailing edge of the clock signal, and a selector which, during a period from the leading edge to the trailing edge of the clock signal, selects an output data from the first latch circuit, and during a period of the trailing edge to a next leading edge of the clock signal, selects an output data from the second latch circuit, in which one of the first latch circuit and the second latch circuit functions as a master latch circuit for receiving a scan data during a scan mode, and the other of the first latch circuit and the second latch circuit functions as a slave latch circuit for latching data outputted from the master latch circuit.

Flip flop circuit and apparatus using a flip flop circuit

An aspect of the present invention provides a semiconductor device that includes a logic circuit including at least one transistor with a first channel type, a first transistor with a second channel type configured to provide the logic circuit with a first voltage at a specified timing, and a precharge control unit configured to turn on at least one first channel type transistor in the logic circuit during the time when the first transistor with the second channel type provides the logic circuit with the first voltage, the precharge control unit configured to precharge a node coupled to a transistor of the first channel type in the logic circuit.

Semiconductor device with charge share countermeasure

A tristate buffers includes a logic circuit which outputs a high-level signal. The output signal is fed to gates of 1st and 2nd P-channel MOS transistors (TRs). A 3rd PMOS TR has a gate connected to a drain of the 2nd PMOS TR, and a drain connected to a drain of the 1st PMOS TR. A 4th PMOS TR has a gate connected to the drain of the 1st PMOS TR, and a drain connected to the drain of the 2nd PMOS TR. A 1st NMOS TR and a 2nd NMOS TR have their drains connected respectively to the drains of the 1st and the 3rd PMOS TRs and the drains of the 2nd and the 4th PMOS TRs. A 3rd NMOS TR and a 4th NMOS TR are connected respectively between the source of the 1st NMOS TR and ground and the source of the 2nd NMOS TR and the ground. The drains of the 1st and the 3rd PMOS TRs and the 1st NMOS TR are connected to an inverter. A 5th PMOS TR is connected to the drains of the 2nd and the 4th PMOS TRs and the 2nd NMOS TR. A 5th NMOS TR is connected between the signal output and the ground and is fed on its gate by the inverter output.

Tristate buffer

A CAM Cell circuit having a memory cell circuit to store data, a decision circuit to decide whether comparison data match stored data on said memory cell circuit or not, and an output circuit to output a decision result made by said decision circuit to a match line is disclosed. The CAM Cell circuit has an exclusive-OR circuit connecting in parallel a circuit having first and second transistors in series-connection. It also has a circuit having third and fourth transistors in series-connection. The CAM Cell circuit also has a pre-charging circuit having a circuit connecting in series fifth and sixth transistors with different polarity from that of the first to fourth transistors, wherein stored data on the memory cell circuit, and stored data with different polarity from that of the former data are applied to each gate of the second and fourth transistors, respectively, the fifth and sixth transistors simultaneously become on to pre-charge the exclusive-OR circuit to output a not-match signal to said match line by controlling the output circuit before the decision operation. Subsequently, comparison data and comparison data with different polarity from that of the former data are supplied to each gate of the first and third transistors, respectively, and the exclusive-OR circuit decides whether the stored data on the memory cell circuit match the comparison data to output a match or not-match signal to said match line by controlling said output circuit based on a decision result.

CAM Cell Circuit having decision circuit

A high-speed LSI chip to be tested and evaluated by a readily available low-speed semiconductor tester and evaluation equipment. The high-speed LSI includes within the chip a clock supply circuit for supplying a high speed clock and an internal circuit, connected to the clock supply circuit, in which the high-speed clock is supplied from the clock supply circuit. A method for testing and evaluating the LSI chip. The method includes the steps of: supplying a high-speed clock generated from a clock supply circuit which is located within the semiconductor chip; and sending back a result of a semiconductor chip in response to the high-speed clock to the tester/evaluation equipment to be evaluated.

Growing community of inventors

Tokyo, Japan

Masashi Hirano