Semiconductor Components Industries, LLC

Masaru Suzuki

Jefferson W Hall

Mohammed Tanvir Quddus

Takeshi Ishiguro

Raj Nair

Mohamed Imam

A semiconductor device ( ) is disclosed which can accommodate a negative voltage on its source using a P-type substrate ( ) which is connected to ground potential. A first embodiment illustrates a device which can handle high voltage applications as well as a negative voltage applied to the source. A drain contact region ( ) is recessed by a dimension (X) from a first insulated region ( ). The dimension (X) provides for an optimum distance for high voltage applications while avoiding lateral surface punch-through. A second embodiment illustrates a gate structure ( ) having a shape which surrounds a drain contact region ( ) and accommodates a high voltage application while also eliminating the lateral surface punch-through. The drain contact region ( ) is formed in a P-type region ( ) centered inside the gate structure ( ).

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Aizuwakamatsu, Japan

Masaru Suzuki