Sharp Kabushiki Kaisha Corporation

Masaru Nawaki

Hiroshi Iwata

Akihide Shibata

Yoshinao Morikawa

Yoshifumi Yaoi

Yasuaki Iwase

Nobuaki Matsuoka

Kei Tokui

Koji Hamaguchi

Tomoyuki Tagami

Kenichi Tanaka

Makoto Ihara

Yasuo Torimaru

Toshiji Ishii

Tutomu Nakamura

Kohji Hamaguchi

Hirofumi Higashino

Shounosuke Ueno

Masaru Shiraishi

Ryoichi Kumazawa

A semiconductor memory device includes a page buffer circuit and an arrangement of memory elements each including: a gate electrode provided on a semiconductor layer with an intervening gate insulating film; a channel region provided beneath the gate electrode; a diffusion area provided on both sides of the channel region, having an opposite polarity to the channel region; and a memory functioning member provided on both sides of the gate electrodes, having a function of storing electric charge. The page buffer circuit provides a common resource shared between a memory array controller and a user. The page buffer circuit has two planes containing random access memory arrays. The page buffer circuit also includes a mode control section to facilitate access to the planes over a main bus in user mode and access to the planes by the memory array controller in memory control mode.

Semiconductor memory device, page buffer resource assigning method and circuit therefor, computer system and mobile electronic device

A memory cell array employs a memory element as a memory cell. The memory element is constructed of a gate electrode formed via a gate insulation film on a semiconductor layer, a channel region arranged under the gate electrode, diffusion regions that are arranged on both sides of the channel region and have a conductive type opposite to that of the channel region, and memory function bodies that are arranged on both sides of the gate electrode and have a function to retain electric charges. When first and second power voltages VCCand VCCsupplied from the outside are lower than a prescribed voltage, a rewrite command to a memory circuitthat includes the memory cell array is inhibited by a lockout circuit. With this arrangement, there are provided a semiconductor storage device capable of achieving storage retainment of two bits or more per memory element and stable operation even if the device is miniaturized and preventing the occurrence of a malfunction of rewrite error and so on attributed to a reduction in the power voltage supplied from the outside and a control method therefor.

Semiconductor memory device, method for controlling the same, and mobile electronic device

There is provided a semiconductor storage device and portable electronic equipment including a nonvolatile memory element that can easily be miniaturized. The semiconductor storage device includes a memory cell arrayin which a plurality of memory elementsare arranged and a write state machine. The memory elementincludes a gate electrodeformed on a semiconductor layervia a gate insulator, a channel region arranged below the gate electrode, diffusion regionsthat are located on both sides of the channel region and have a conductive type opposite to that of the channel region and memory function bodiesthat are located on both sides of the gate electrodeand have a function to retain electric charge. The write state machinecan selectively prevent program and erase of data in the memory elements within a predetermined range.

Semiconductor storage device, method for protecting predetermined memory element and portable electronic equipment

When an input voltage determining circuitdetermines that an input voltage exceeds a prescribed voltage, a control circuitof a positive polarity power selector circuitturns on a first switch SWand turns off second and third switches SWand SW, thereby supplying the input voltage to a memory cell arrayvia the first switch SW. When the input voltage determining circuitdetermines that the input voltage is not higher than the prescribed voltage, the control circuitturns off the first switch SWand turns on the second and third switches SWand SW, thereby supplying a voltage from a charge pumpvia the second and third switches SWand SW. By this operation, the memory element is able to retain storage of two bits or more even if miniaturized, to execute stable operation with a small circuit area and to prevent circuit malfunction attributed to a small current supplied to the memory cell array.

Semiconductor storage device and mobile electronic device

A semiconductor memory device includes: a memory cell having a gate electrode formed on a semiconductor layer via a gate insulating film, a channel region disposed below the gate electrode, a diffusion region disposed on both sides of the channel region and having a conductive type opposite to that of the channel region, and memory functional units formed on both sides of the gate electrode and having a function of retaining charges; and an amplifier, the memory cell and the amplifier being connected to each other so that an output of the memory cell is inputted to the amplifier.

Semiconductor memory device, display device, and portable electronic apparatus

A programming verification method of verifying programming of a nonvolatile memory cell, the method comprising at least the steps of: selecting first, second, . . . and n-th references corresponding to first, second, . . . and n-th threshold voltages specifying lower limit values of states, . . . and n, respectively; applying a programming voltage to the nonvolatile memory cell; sensing a threshold voltage level of the nonvolatile memory cell; comparing the sensed threshold voltage level with the first reference to output a first result; comparing the threshold voltage level with one of the second and third references selected according to the first result to output a second result; and comparing the first and second results with an expectation value and, in the case where the first and second results are equal to the expectation value, indicating that the programming has succeeded, wherein the nonvolatile memory cell includes a gate electrode formed on a semiconductor layer via a gate insulating film, a channel region disposed under the gate electrode, a source and a drain as diffusion regions disposed on both sides of the channel region and having a conductive type opposite to that of the channel region, and memory functional units formed on both sides of the gate electrode and having the function of retaining charges.

Programming verification method of nonvolatile memory cell, semiconductor memory device, and portable electronic apparatus having the semiconductor memory device

A semiconductor storage device includes a plurality of memory elements and a redundancy circuit. Each of the memory elements includes a gate electrode provided on a semiconductor layer, a gate insulating film intervening between the gate electrode and the semiconductor layer, a channel region provided under the gate electrode, diffusion regions respectively provided at both sides of the channel region, the diffusion regions having a conductivity type which is opposite a conductivity type of the channel region, and memory functioning members respectively provided at both sides of the gate electrode, the memory functioning members having a function of holding charge. The redundancy circuit addresses a single chip memory including cells associated with a plurality of redundant lines and includes a decoder for selecting a redundant row. The semiconductor storage device can permanently inactivate further programming of the redundancy circuit in order to prevent a user from performing inadvertent programming.

Semiconductor storage device, redundancy circuit thereof, and portable electronic device

A computer system comprising: (A) a CPU; (B) a memory arrangement comprising: (i) a side-wall memory array including a plurality of side-wall memory transistors; (ii) a charge pump; (iii) a plurality of switching circuits; and (iv) logic circuitry; and (C) a system bus, wherein each of the side-wall memory transistors comprises: a gate electrode formed on a semiconductor layer with a gate insulating film formed on the semiconductor layer; a channel region formed below the gate electrode; a pair of diffusion regions formed on the both sides of the channel region and having a conductive type opposite to that of the channel region; and a pair of memory functional units formed on the both sides of the gate electrode and having a function of retaining charges.

Computer system, memory structure and structure for providing storage of data

A semiconductor storage device is provided, which comprises a memory array comprising memory elements, a write state machine for applying a first voltage for performing a write or erase operation, with respect to one of the memory elements, to the memory element via a bit line connected thereto, and thereafter, applying a second voltage for verifying whether or not the write or erase operation has been performed, to the memory element via the bit line, and a reset portion for grounding the bit line connected to the memory element after the write state machine has applied the first voltage and before the write state machine has applied the second voltage. Each memory element comprises a gate electrode, a channel region, diffusion regions, and memory function sections provided on opposite sides of the gate electrode and having a function of retaining charges.

Semiconductor storage device, mobile electronic apparatus, and method for controlling the semiconductor storage device

A semiconductor storage device is provided, which comprises a memory array comprising memory elements, a write state machine for performing a sequence of a program or erase operation with respect to the memory array, a decoder for decoding a signal indicating a current state of the write state machine, which is output from the write state machine, and outputting a status signal indicating a status of the program or erase operation with respect to the memory array, a status register for storing the status signal, and an output circuit for outputting the status signal stored in the status register. Each memory element comprises a gate electrode, a channel region, diffusion regions, and memory function sections provided on opposite sides of the gate electrode and having a function of retaining charges.

Semiconductor storage device and mobile electronic apparatus

A semiconductor storage device is provided, which comprises a memory array comprising memory elements. Each memory element comprises a gate electrode, a channel region, first and second diffusion regions, and first and second memory function sections provided an opposite aides of the gate electrode and having a function of retaining charges. The device further comprises a row decoder for selecting a word line in accordance with a row address, and a write control circuit for applying a write pulse to a bit line, which is connected to one of the first and second diffusion regions of the memory element connected to the selected word line, in accordance with a column address. The write control circuit controls the application of the write pulse so that a quantity of charges retained in one of the first and second memory function sections corresponds to a value of multibit data.

A semiconductor storage device is provided, which comprises a memory array comprising a plurality of memory elements, a section for performing an erase or program operation with respect to the memory array, a section for receiving a suspend command, and in response to the suspend command, suspending the erase or program operation, and a section for receiving a resume command, and in response to the resume command, resuming the suspended erase or program operation. Each of the plurality of memory elements comprises a gate electrode provided via a gate insulating film on a semiconductor layer, a channel region provided under the gate electrode, diffusion regions provided on opposite sides of the channel region and having a conductivity type opposite to that of the channel region, and memory function sections provided on opposite sides of the gate electrode and having a function of retaining charges.

Semiconductor storage device, mobile electronic apparatus, method for controlling erase operation, and method for controlling program operation

A semiconductor memory device including (A) a global line; (B) a memory array having (i) a local line, (ii) a decoder connected to the global line and the local line, and (iii) a memory block and a redundant block each constructed by a plurality of memory cells each having a gate electrode formed on a semiconductor layer via a gate insulating film, a channel region disposed below the gate electrode, a diffusion region disposed on both sides of the channel region and having a conductive type opposite to that of the channel region, and a memory functional unit formed on both sides of the gate electrode and having the function of retaining charges, the memory array having the function that when the decoder is usable, the global line is selectively connected to one of the local lines in accordance with address information and, when a defective block is included in the memory blocks and the decoder is unusable, the local line is separated from the global line and the defective block is replaced with the redundant block; and (C) a circuit for making the decoder of the defective block unusable and, only when the defective block is addressed, for making the decoder of the redundant block usable.

Semiconductor memory device and portable electronic apparatus

A semiconductor memory device includes a controller programming a nonvolatile memory cell by applying a first pulse so that a charge amount smaller than a target charge amount is accumulated in the nonvolatile memory cell, a second pulse train so that a second charge amount smaller than the target charge amount and larger than the first charge amount is accumulated in the nonvolatile memory cell, and a third pulse train so that a third charge amount falling within an allowable error range of the target charge amount is accumulated. The semiconductor memory cell includes a gate electrode formed on a semiconductor layer via a gate insulating film, a channel region disposed under the gate electrode, diffusion regions disposed on both sides of the channel region and memory functional units formed on both sides of the gate electrode.

Semiconductor memory device and portable electronic apparatus including the same

A semiconductor memory device includes: a plurality of nonvolatile memory cells; a first load cell for generating a read voltage relative to a read current during reading from a selected nonvolatile memory cell; a reference cell for storing a reference state corresponding to a reference current of the selected nonvolatile memory cell; a second load cell for generating a voltage based on the reference current through the reference cell; and a programming circuit for generating a reference voltage equal to a voltage obtained from a specific current-voltage characteristic of the first load cell with respect to the reference current and programming the reference cell so as to equalize the voltage of the second load cell with the reference voltage, thereby to compensate for variations in the first load cell. And each of the nonvolatile memory cell includes a gate electrode formed on a semiconductor layer via a gate insulating film, a channel region disposed under the gate electrode, diffusion regions disposed on both sides of the channel region and having a conductive type opposite to that of the channel region, and memory functional units formed on both sides of the gate electrode and having a function of retaining charges.

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Nara, Japan

Masaru Nawaki