Tokyo Shibaura Denki Kabushiki Kaisha

Kabushiki Kaisha Toshiba

Tokyo Shibaura Electric Co., Ltd.

Masaru Hashimoto

Norio Nakamura

Makoto Mori

Kazuo Imanishi

Susumu Matsumoto

Toshio Shiramatsu

Nobuyasu Goto

Hitoshi Kinoshita

Katsuyuki Omi

Daijiro Kubo

Takayuki Ban

Motoaki Yoshinaga

Hirokazu Fukuda

An optical sensing circuit is provided with a light detector, a voltage to current conversion circuit connected to the light detector, and a comparator. The voltage to current conversion circuit includes an electric resistor and a current mirror circuit connected in parallel to the resistor. The voltage to current conversion circuit increases an electric current flowing through the circuit as a voltage of the output of the light detector decreases. The comparator compares the voltage of the output of the light detector with a reference voltage.

Optical sensing circuit with voltage to current converter for pointing device

A delay-time variable filter delays an input signal by a desired time according to a control signal from a control input node and outputs the delayed input signal, and a positive feedback loop circuit changes the output signal (sinusoidal wave signal) from this filter, and provides a positive feedback of the binary pulse signal to the input side of the filter at a desired level for carrying out an oscillation. This positive feedback loop circuit includes a circuit for changing the signal into a binary signal and providing a positive feedback of the binary signal to the input of the filter by limiting the signal at a desired amplitude. As the delay-time variable filter, a quartic Butterworth low-pass filter is used, for example. As the positive feedback loop circuit, there is used a voltage comparator circuit that changes an input signal into a binary signal and outputs a pulse signal of a desired amplitude.

Voltage-controlled oscillator, phase synchronization circuit and signal processing circuit

A high input impedance circuit includes an amplifier such as an operational amplifier comprising transistors of a first polarity which serve as a differential pair and input of the amplifier, base of one transistor being caused to serve as a positive input terminal, base of the other transistor being caused to serve as a negative input terminal. The high input impedance circuit further includes a transistor having base connected to the positive input terminal, and a second polarity opposite to the first polarity, wherein collector of the transistor of the second polarity is connected through d.c. path to a first power supply, e.g., ground, and emitter of the transistor of the second polarity is connected through d.c. path to a second power supply, e.g., power supply voltage terminal through a resistor to apply a signal in phase with an input signal delivered to the positive input terminal to the emitter of the transistor of second polarity to thereby allow input impedance to be higher. In addition, a semiconductor device provided with such a high input impedance circuit is also provided.

High input impedance circuit and semiconductor integrated device

Frequency converter

A temperature detection circuit includes first and second current sources and a comparing circuit. A first current source generates a current having a positive temperature coefficient and flowing in a band gap type voltage source. A second current source generates a current having a zero or negative temperature coefficient. The comparing circuit compares the amounts of currents flowing in the first and second current sources to detect the relation between the magnitudes of the compared currents.

Temperature detection circuit used in thermal shielding circuit

A semiconductor device capable of suppressing the influence of a parasitic pnp transistor caused when an npn transistor operates in saturation range in such a way that a p-type impurity region is formed in the outer layer of an n-type collector region and electrically short-circuited with the n-type collector region isolated by a p-type isolation diffusion layer in the npn bi-polar transistor.

NPN transistor with P/N closed loop in contact with collector electrode

Disclosed is a level detector in use with a differential amplifier circuit in an amplitude-limiting amplifying system for angle-modulation signal amplification. The differential amplifier circuit is made up of differentially paired transistors. The level detector contains first and second transistors which form a differential pair. In the first transistor, the base is connected to an interjunction of the emitters of the differentially paired transistors. A second transistor is connected at the emitter to the emitter of the first transistor. A current source is connected to the emitter interjunction of the first and second transistors. A bias circuit applies a predetermined bias potential to the base of the second transistor. An output signal containing the detected level information of the input signal is derived from the collector of the first or second transistor.

Level detector

A protection circuit for an output transistor which produces a protecting signal representing the power consumption of the output transistor, namely the product of collector current and collector to emitter voltage of the output transistor, thereby protecting the output transistor over a broad operating range.

Protection circuit for an output transistor

A differential amplifier circuit includes first and second differential amplifiers, with respective first input terminals thereof connected to each other and first and second current sources for supplying first and second drive currents to drive the first and second amplifiers respectively. The first and second drive currents are set such that their sum is constant. The differential amplifier circuit further includes first and second transistors with the bases thereof connected to second input terminals of the first and second amplifiers respectively and third and fourth current sources respectively connected to the current paths of the first and second transistors and supplying third and fourth drive currents equal to one half the respective second and first drive currents.

Differential amplifier circuit

An FM stereo signal demodulator for separating a composite stereo signal into left and right signals is disclosed wherein the amplitude of the 38 kHz signal necessary to separate the composite signal is varied in accordance with the field strength of a received signal.

FM Stereo signal demodulator

A constant voltage circuit having an input voltage applied to input terminals, and which generates a constant voltage at its output terminals, wherein a first transistor is connected between one input terminal and one output terminal with the base of the first transistor connected through a second transistor to the other input terminal. A current related to the input voltage is applied to a connecting point between the first and second transistors. A first current path is constituted between the input terminal and the output terminal, and a second current path is connected to the connecting point and passes a current in response to the current in the first current path.

Constant voltage circuit

A trigger circuit comprises first, second and third transistors whose emitters are connected in common to a constant current source, a current mirror having input and output terminals connected respectively to the collectors of the second and third transistors, a diode connected between the collector of the first transistor and the input terminal of the current mirror, and a switching transistor whose base and collector are connected respectively to the output terminal of the current mirror and the collector of the first transistor. The bases of the first and second transistors are connected in common to a first input terminal, while the base of the third transistor is connected to a second input terminal. A trigger signal is applied between the first and second input terminals. The diode and switching transistor are on and off respectively in one of two stable states of the trigger circuit, and are off and on respectively in the other. The threshold voltage levels of the circuit depend on the mirror ratio of the current mirror and the geometric dimensions of the first, second and third transistors.

Trigger circuit

Disclosed is a high-frequency amplifier circuit which comprises a first transistor with its base coupled to a high-frequency input terminal and grounded through a first diode and emitter grounded, a second transistor with its emitter coupled to the collector of the first transistor, base grounded through second and third diodes and coupled to a reference power supply terminal through a resistor, and collector directly coupled to the reference power supply terminal, and a third transistor with its base coupled to the emitter of the second transistor, emitter grounded, and collector coupled to an output terminal.

High-frequency amplifier circuit

A constant current circuit including an emitter follower stage consisting of a transistor and a resistance connected in series thereto, an output stage connected in cascade with the emitter follower stage, and two diodes connected in series between the base of the transistor and an external power source, whereby a desired output current which flows through said output stage is obtained by supplying predetermined currents to the diodes and the emitter follower stage respectively.

Constant current circuit

A MOS IC oscillation circuit comprising a circuit including a MOS FET and a resistor connected in series between a power source and ground, a capacitor one end of which is connected to the junction between both said components and the other end is connected to said power source or the ground, and a Schmitt trigger circuit receiving an input signal from the junction and produces an output signal which controls 'on-off' operation of the MOS FET.

Growing community of inventors

Ayase, Japan

Masaru Hashimoto