Nec Corporation

Toshiba Chemical Corporation

Ikari Corporation

Masao Shimada

Fumio Nakaya

Toshihiko Oguchi

A network information detection apparatus includes a packet monitoring section and a subnet mask detection section. The packet monitoring section monitors packets on LAN connecting a plurality of network devices. Based on an IP address included in at least one monitored packet, the subnet mask detection section detects a subnet mask of a network device having the monitored IP address. When a destination MAC address and a destination IP address included in the monitored packet do not indicate the same network device, a router of the LAN can be detected by detecting an IP address corresponding to the destination MAC address.

Device and method for automatically detecting network information

An I/O-request processing system which is capable of reducing the maximum value of the time required until the I/O request of each external device is registered. An I/O-request receiving section () receives an I/O request issued from an external device (). A process-information storage section () stores an I/O-request delay time () for each external device (). A priority-process judgment section () registers the I/O request having a maximum I/O-request delay time () among the I/O requests which have been registered into an I/O-request cue ().

I/O-request processing system and method

Search IP addresses are detected from among a preset number of selected IP addresses available on the network, and DNS query message and ICMP echo request message are transmitted at a time to the detected search IP addresses. DNS server and router IP addresses are detected from response messages in response to the DNS query message and the ICMP echo request message.

Network information detection apparatus and method

A surface of a semiconductor wafer having a plurality of semiconductor elements thereon is laminated on a first wafer holding substrate. Subsequently, the whole rear surface of the semiconductor wafer is coated with a first conductive layer. Then a second conductive layer is selectively formed thereon. Then, a rear surface side glass substrate is laminated on the first and second conductive layer. Subsequently, the first wafer holding substrate is peeled off. Subsequently, the semiconductor wafer is selectively etched so as to be separated into semiconductor elements. Then, the first conductive layer is connected to a ground potential to measure electrical characteristics of the semiconductor elements and sort the semiconductor elements into non-defectives and defectives. Then, the first conductive layer is selectively etched so as to be separated into chips and thus semiconductor pellets are formed. Finally, the second wafer holding substrate is peeled off.

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Tokyo, Japan

Masao Shimada