Kabushiki Kaisha Toshiba

Toshiba Memory Corporation

Kioxia Corporation

Masao Iwase

Ryota Katsumata

Tomoo Hishida

Sadatoshi Murakami

Soichi Nadahara

Tadashi Iguchi

Katsuya Okumura

Kyoichi Suguro

Hajime Nagano

Yukihiro Ushiku

Hiroaki Yamada

Atsushi Murakoshi

Hiroshi Matsushita

Tsunetoshi Arikado

Norihiko Tsuchiya

Shinichi Nitta

Junji Sugamoto

Katsujiro Tanzawa

Moriya Miyashita

Yuso Udo

Mitsuo Koike

Tadayuki Asaishi

Hiroyasu Tanaka

Toru Matsuda

Makoto Yoshimi

Kazuhiko Takase

Shuichi Kuboi

Sanae Fukuda

A semiconductor memory includes a memory cell region that includes multiple memory cells stacked above a semiconductor substrate, first and second dummy regions on opposite sides of the memory cell region, each dummy region including multiple dummy cells stacked above the semiconductor substrate, and a wiring that electrically connects dummy cells of the first and second dummy regions that are at a same level above the semiconductor substrate.

Semiconductor memory having memory cell regions and other regions alternately along a bit line direction

Semiconductor memory having memory cell regions and other regions alternately arranged along a bit line direction

Semiconductor memory having first and second memory cell regions separated by a third region along a bit line direction

Semiconductor memory

According to one embodiment, a nonvolatile semiconductor memory device includes: a substrate; a memory unit provided on the substrate; and a non-memory unit provided on the substrate. The memory unit includes: a first stacked body including a plurality of first electrode films and a first inter-electrode insulating film, the plurality of first electrode films being stacked along a first axis perpendicular to the major surface, the first inter-electrode insulating film being provided between two of the first electrode films mutually adjacent along the first axis; a first semiconductor layer opposing side surfaces of the first electrode films; a first memory film provided between the first semiconductor layer and the first electrode films; and a first conductive film provided on the first stacked body apart from the first stacked body. The non-memory unit includes a resistance element unit of the same layer as the conductive film.

Nonvolatile semiconductor memory device and method for manufacturing same

According to one embodiment, a method is disclosed for manufacturing nonvolatile semiconductor memory device including forming a stacked body by alternately stacking an electrode layer and a layer-to-be-etched, and forming an oxidized layer between the layer-to-be-etched provided at least in any side of an upper side and a lower side of the electrode layer and the electrode layer. The method can include forming a groove which passes through the stacked body. The method can include embedding an insulating body within the groove. The method can include forming a hole which passes through the stacked body. The method can include selectively removing the layer-to-be-etched via the hole. The method can include forming a charge storage layer in an inner side of the hole. The method can include forming a channel body layer in an inner side of the charge storage layer.

Method for manufacturing nonvolatile semiconductor memory device

A nonvolatile semiconductor memory device includes: a substrate; a stacked body with a plurality of dielectric films and electrode films alternately stacked therein, the stacked body being provided on the substrate and having a step in its end portion for each of the electrode films; an interlayer dielectric film burying the end portion of the stacked body; a plurality of semiconductor pillars extending in the stacking direction of the stacked body and penetrating through a center portion of the stacked body; a charge storage layer provided between one of the electrode films and one of the semiconductor pillars; and a plug buried in the interlayer dielectric film and connected to a portion of each of the electrode films constituting the step, a portion of each of the dielectric films in the center portion having a larger thickness than a portion of each of the dielectric films in the end portion.

A semiconductor device including a semiconductor substrate, and a memory cell and a peripheral circuit provided on the semiconductor substrate, the memory cell having a first insulating film, a first electrode layer, a second insulating film, and a second electrode layer provided on the semiconductor substrate in order, and the peripheral circuit having the first insulating film, the first electrode layer, the second insulating film having an opening for the peripheral circuit, and the second electrode layer electrically connected to the first electrode layer through the opening for the peripheral circuit, wherein a thickness of the first electrode layer under the second insulating film of the peripheral circuit is thicker than a thickness of the first electrode layer of the memory cell.

Semiconductor device and method for manufacturing the same

Integral circuit including non-volatile memory cell

A semiconductor wafer has a bevel contour formed along the periphery thereof, products formed on the wafer, and an ID mark formed on the bevel contour. The ID mark shows at least the properties, manufacturing conditions, and test results of the products.

Semiconductor wafer with ID mark, equipment for and method of manufacturing semiconductor device from them

Growing community of inventors

Yokohama, Japan

Masao Iwase