Matsushita Electric Industrial Co., Ltd.

Matsushita Electronics Corporation

Matsushita Electric Co., Ltd.

Masanobu Nogome

Akiyoshi Tamura

Keiichi Murayama

Yoshitaka Kuroishi

Kazutsune Miyanaga

A hetero-junction bipolar transistor that satisfies high resistance required to avoid a potential breakdown includes: an n-type sub-collector layerthat is made of GaAs; an n-type first collectorthat is made of a semiconductor material with a smaller avalanche coefficient than that of the sub-collectorand is formed on the sub-collector layer; a second collector layerthat is made of n-type or i-type GaAs with lower dopant concentration than that of the sub-collector layerand is formed on the first collector layer; a p-type base layerthat is made of GaAs and is formed on the second collector layer; and emitter layerthat is made of a semiconductor material with a larger band gap than that of the base layerand is formed on the base layer

Hetero-junction bipolar transistor and manufacturing method thereof

A semiconductor device is provided having an improved breakdown voltage on high power output, the semiconductor device comprising a n-type GaAs subcollector layer, a n-type GaAs intermediate collector layer formed between a collector layer and the subcollector layer, the n-type GaAs collector layer, a p-type GaAs base layer, a n-type InGaP second emitter layer, a n-type GaAs first emitter layer, and a n-type InGaAs emitter contact layer, and a concentration of impurities in the intermediate collector layer is higher than a concentration of impurities in the collector layer and is lower than a concentration of impurities in the subcollector layer.

Semiconductor device

A semiconductor device includes a substrate with a via hole. An electrode is formed on a surface of the substrate so that a portion of the electrode extends through the via hole. A photosensitive resin is formed over the surface so as to cover an aperture of the via hole.

Semiconductor device including a photosensitive resin covering at least a portion of a substrate having a via hole

A GaAs substrateis rotated, a photosensitive silicone resistis applied on a surface of the GaAs substrateon which an aperture of a holeto be a via hole, and an inside of the holeto be the via hole is filled in with the photosensitive silicone resistNext, the GaAs substrateis further rotated, changing the number of revolutions (rpm), and the photosensitive silicone resiston the GaAs substrate is flattened. Next, a reverse side of the GaAs substrate is grinded, the holeto be the via hole penetrates the GaAs substratefrom the surface to the reverse side and the via holeis formed. Next, a reverse side electrodeis formed on the reverse side of the GaAs substrateNext, the GaAs sustrateis divided chip by chip and chips are laid on a substrate for assemblyvia an adhesive metal

Semiconductor device and manufacturing method thereof

A method of producing a hetero-junction bipolar transistor includes: laminating semiconductor layers that are to be a subcollector layer, a collector layer, a base layer, an emitter layer and an emitter cap layer successively on one surface of a semi-insulating substrate; and forming an electrode layer on the emitter cap layer. The method also includes adjusting the shape of the emitter cap layer to be a predetermined shape by wet etching; and removing end portions of the electrode layer so that the edges of the electrode layer are substantially aligned to the edges of the top face of the emitter cap layer. Furthermore, the method includes removing a surface oxidized layer formed on the emitter layer. Thus, defective etching of the emitter layer including an element P of group V is resolved, and a hetero-junction bipolar transistor having predetermined properties can be produced stably.

Method of producing hetero-junction bipolar transistor

A semiconductor device includes two or more semiconductor elements provided on a semi-insulating substrate with a buffer layer and an interlevel film being interposed therebetween, an element isolating portion provided as a result of forming a groove between the two or more semiconductor elements through the buffer layer and the interlevel film so as to reach the semi-insulating substrate, and a protective film for protecting at least ends of the buffer layer in the vicinity of the element isolating portion.

Growing community of inventors

Bizen, Japan

Masanobu Nogome