Fujitsu Corporation

Fujitsu Semiconductor Limited

Masamitsu Ikumo

Hirohisa Matsuki

Eiji Watanabe

Tetsuya Fujisawa

Hiroyuki Yoda

Mitsutaka Sato

Yoshitaka Aiba

Yutaka Makino

Tadahiro Okamoto

Masanori Onodera

Norio Fukasawa

Shinsuke Nakajyo

Toshimi Kawahara

Yasuhiro Shinma

Shuichi Chiba

Kenichi Nagashige

Osamu Igawa

Takashi Hozumi

Masahiko Ishiguri

Toshimi Kawashara

A semiconductor device includes a plurality of electrode layers provided at designated positions of a semiconductor substrate, an organic insulation film formed on the semiconductor substrate by selectively exposing designated areas of the electrode layers, and projection electrodes for outside connection, the projection electrodes being formed on the designated areas of the electrode layers. Thickness of the organic insulation film situated in the vicinity of the periphery of the projection electrodes is greater than thickness of the organic insulation film situated between the projection electrodes.

Semiconductor device and manufacturing method of the same

A method for manufacturing semiconductor device which includes forming a first metal film over an electrode pad disposed on a substrate, forming a second metal film on the first metal film, forming a first oxide film on a surface of the first metal film and a second oxide film on a surface of the second metal film by oxidizing the surfaces of the first metal film and the second metal film, removing the first oxide film, and melting the second metal film after removing the first oxide film.

Method for manufacturing semiconductor device having electrode for external connection

A multilayer wiring board having a plurality of wiring boards in which wiring layers and resin layers in each wiring board are alternately arranged in a laminated formation. In the multilayer wiring board, all the resin layers and the wiring layers, except a resin layer in the plurality of wiring boards, are separated in a same position between the plurality of wiring boards and the resin layer is continuous in the same position.

Multilayer wiring board and its manufacturing method

A semiconductor device comprises a frame provided on a substrate to form a semiconductor-chip accommodating part on the substrate. A semiconductor chip is provided in the semiconductor-chip accommodating part. An organic insulating layer is provided to cover the semiconductor chip and the frame. A wiring layer is provided on the organic insulating layer. In the semiconductor device, the frame comprises gaps which are arranged in a longitudinal direction of the frame.

Semiconductor device and method of manufacturing the same

A semiconductor device has antenna pads and a testing pad formed on the substrate. An insulating resin layer containing a filler covers the testing pad, and bumps are provided on the antenna pads. Specific data in the semiconductor device are inhibited from being read out or rewritten, by the provision of the insulating resin layer containing a filler.

Semiconductor device with read out prevention and method of producing same

A semiconductor device includes a semiconductor substrate and an array of protruding electrodes arranged at a pitch X. Each of the protruding electrodes has a height Xand is formed on a barrier metal base of diameter Xcoupled to an electrode arranged on the semiconductor substrate so as to satisfy the relations (X/2)&#x2266;X(3*X/4) and (X/2)&#x2266;X(3*X/4).

Semiconductor device and method of fabricating the same

In a semiconductor device circuit formation surfaces of each of a plurality of semiconductor chips can be easily located at even level when the semiconductor chips are arranged side by side so that a process of forming rearrangement wiring is simplified. The semiconductor chips are mounted on a substrate via an adhesive layer in a two-dimensional arrangement. A resin layer is formed on the substrate and located around the semiconductor elements. The resin layer has the same thickness as a thickness of the semiconductor elements. An organic insulating layer is formed over a surface of the resin layer and circuit formation surfaces of the semiconductor elements. A rearrangement wiring layer is formed on the organic insulating layer and electrodes of the semiconductor chips. External connection terminals are electrically connected to the circuit formation surfaces of the semiconductor elements through wiring in the rearrangement wiring layer.

Semiconductor device configured to be surface mountable

A structure in which a phosphorus-nickel layer, a rich phosphorus nickel layer that contains phosphorus or boron higher than this phosphorus-nickel layer, a nickel-tin ally layer, a tin-rich tin alloy layer, and a tin alloy solder layer are formed in sequence on an electrode. Accordingly, adhesiveness between a metal pattern used as the electrode, the wiring, or the pad and the solder can be improved.

External connection terminal and semiconductor device

A group of wires that bonds the first semiconductor chip and the second semiconductor chip together and extends on the first semiconductor chip is formed of a single plated film through plating in one continuous process. The second semiconductor chip is then bonded onto the first semiconductor chip to complete a semiconductor package.

Semiconductor device and method for fabricating the same

A mounting substrate and related mounting method for a semiconductor device. The mounting substrate includes a mounting area to which the semiconductor device is to be mounted and fixed by an adhesive, a peripheral channel formed in the mounting substrate so as to surround the mounting area, and radial channels extending radially from the center towards the periphery of the mounting area. An adhesive is applied at least to either the center of the mounting surface of the semiconductor device or the center of the mounting area of the mounting substrate. The semiconductor device is placed on the mounting area and the adhesive flows outwardly along the radial channels, with the adhesive then being cured. The peripheral channel provides control of the amount of adhesive which flows to the outside of the semiconductor device and the mounting area. The adhesive overflow can be adjusted such that adhesive climbs up the sides of the semiconductor device but not reach the upper surface of the device.

Mounting substrate and mounting method for semiconductor device

A wafer level semiconductor device including a wafer having a plurality of semiconductor elements formed on an upper surface thereof, a sealing resin including a first part for sealing the upper surface of the wafer and a second part for sealing a side surface of wafer, the second part having a lower edge surface flush with a lower surface of the wafer, and a film for covering the lower surface of wafer and the lower edge surface of the second part of the sealing resin and conducting the process using the wafer level semiconductor device in which the film is bonded. This structure prevents warping of the wafer level semiconductor device after the sealing resin is formed on the device and it is then taken out from the mold dies.

Wafer level semiconductor device and method of manufacturing the same

A semiconductor device is provided, which device includes a semiconductor substrate including a plurality of signal pads and ground pads, an insulating film formed on the semiconductor substrate, a conductive metal film formed on the insulating film and electrically connected to the ground pads and a plurality of first interconnection lines electrically connected to the signal pads and insulated from the conductive metal film. The conductive metal film is formed over a region including the first interconnection lines in a plan view of the semiconductor device.

Growing community of inventors

Kawasaki, Japan

Masamitsu Ikumo