Sanyo Electric Co., Ltd.

Semiconductor Components Industries, LLC

Sanyo Semiconductor Co., Ltd.

Masamichi Yanagida

Hirotoshi Kubo

Hiroaki Saito

Masahito Onda

Satoshi Iwata

Junichiro Tojo

The invention realizes low on-resistance and high current flow in a semiconductor device in which a current flows in a thickness direction of a semiconductor substrate. A first MOS transistor having first gate electrodes and first source layers is formed on a front surface of a semiconductor substrate, and a second MOS transistor having second gate electrodes and second source layers is formed on a back surface thereof. A drain electrode connected to the semiconductor substrate, a first source electrode connected to the first source layers, a second source electrode connected to the second source layers, and a first penetration hole penetrating the semiconductor substrate are further formed. A first wiring connecting the first source electrode and the second source electrode is formed in the first penetration hole. The semiconductor substrate serves as a common drain region of the first and second MOS transistors.

MOS transistors formed on the front and back surface of a semiconductor substrate

A capacity layer is formed of non-doped polysilicon. Unlike capacity layers formed of an oxide film, generation of seams and the like can be suppressed and thereby a stable capacity layer can be formed. Moreover, polysilicon used as a capacity layer may be doped polysilicon, and an oxide film formed on the surface of the polysilicon also serves as a capacity film. Thus, provision of an insulated gate device featuring low capacity is made possible.

Insulated gate semiconductor device and manufacturing method of the same

Growing community of inventors

Ota, Japan

Masamichi Yanagida