Kabushiki Kaisha Toshiba

Toshiba Memory Corporation

Alcan International Limited

Nippon Light Metal Company, Ltd.

Soltech, Inc.

Actronics Co., Ltd.

Masamichi Suzuki

Takao Marukame

Atsuhiro Kinoshita

Masato Koyama

Hirotaka Nishino

Akira Nishiyama

Yoshifumi Nishi

Yuuichi Kamimuta

Tsunehiro Ino

Akira Takashima

Yuichiro Mitani

Takahiro Kurita

Kosuke Tatsumura

Masahiro Koike

Yusuke Higashi

Toshihiro Suzuki

Tatsuo Shimizu

Yoshiaki Saito

Takeshi Yamaguchi

Tomoaki Inokuchi

Reika Ichihara

Tetsufumi Tanamoto

Jun Deguchi

Tadaaki Sano

Hideyuki Funaki

Hiroki Noguchi

Kazuhiro Suzuki

Yoshinori Tsuchiya

Kiwamu Sakuma

Daisuke Matsushita

Yuki Sasaki

Yoshinori Iida

Risako Ueno

Shouhei Kousai

Koichiro Zaitsu

Kazuya Matsuzawa

Kensuke Ota

Keiichi Sugiyama

Yuuichiro Mitani

Fumihiko Tachibana

Yousuke Hagiwara

Mitsuhiro Tomita

Makoto Morimoto

Izumi Hirano

Riichiro Takaishi

Tsunehiko Tanaka

Atsushi Sugihara

Haiyang Peng

Mitsuyoshi Fujiike

A memcapacitor according to an embodiment includes a first electrode, a first dielectric layer provided on the first electrode, a plurality of variable resistance portions provided separately from each other on the first dielectric layer, a second dielectric layer provided on the first dielectric layer and between the variable resistance portions, and a second electrode provided on the variable resistance portions and the second dielectric layer. Each of the variable resistance portions is formed of a material that allows diffusion of metal atoms constituting the second electrode to inside of the variable resistance portion, and the second dielectric layer is formed of a material that prevents diffusion of the metal atoms constituting the second electrode to inside of the second dielectric layer.

Memcapacitor, neuro device, and neural network device

According to one embodiment, a memory device includes: a memory cell including a variable resistance element and connected between a word line and a bit line; and a control circuit configured to control an operation of the memory cell. The variable resistance element includes: a first layer including a first compound including oxygen; a second layer including a second compound including oxygen; and a third layer between the first layer and the second layer.

Read circuit for a variable resistance memory device

According to one embodiment, a storage device includes a plurality of memory nodes. Each of memory nodes includes a plurality of input ports, a plurality of output ports, a selector, a packet controller and a memory. The selector outputs a packet input to the input port to one of the output ports. The packet controller controls the selector. The memory stores data. The memory nodes are mutually connected at the input ports and the output ports. The memory node has an address that is determined by its physical position. The packet controller switches the output port that outputs the packet based on information including at least a destination address of the packet and an address of the memory node having the packet controller when receiving a packet that is not addressed to the memory node having the packet controller.

Storage device in which forwarding-function-equipped memory nodes are mutually connected and data processing method

According to an embodiment, an imaging element includes a plurality of light receiving elements, a plurality of scanning circuits, a first line comprising a plurality of nodes, and a plurality of first variable resistance elements. The plurality of scanning circuits are respectively connected to the plurality of light receiving elements. Each of the plurality of first variable resistance elements is connected between the corresponding one of the nodes and a corresponding one of the scanning circuits. At least one of the first variable resistance elements includes a plurality of resistance elements connected to each other in parallel.

Imaging element for use with a retina chip, imaging apparatus including the same, and semiconductor apparatus included in the same

According to an embodiment, a comparator includes a first transistor, a second transistor, an output stage, and a node group. The first transistor is configured to operate when a first voltage applied thereto exceeds a first threshold value, and is disposed in an input stage. The second transistor is configured to operate when a second voltage applied thereto exceeds a second threshold value and is disposed in the input stage. The output stage is configured to perform voltage switching and output according to the change in the magnitude relationship between the first voltage and the second voltage. The node group is configured to, during a non-operational state in which the first voltage and the second voltage are not compared, vary at least either the first threshold value or the second threshold value.

Comparator, AD converter, and wireless communication device

This semiconductor device comprises: a gate insulating film provided on a surface of a channel layer; a gate electrode provided on an upper surface of the gate insulating film; and a diffusion layer provided in the channel layer. Furthermore, this semiconductor device comprises: a polycrystalline silicon film provided so as to cover a surface of the gate electrode and the diffusion layer; and an inter-layer insulating film provided so as to cover the gate electrode and the polycrystalline silicon film.

Semiconductor device with polycrystalline silicon film

According to an embodiment, a semiconductor circuit includes a substrate, a tunnel oxide film, a charge storage film, a blocking layer, and plural nodes. The substrate is made of a semiconductor in which two diffusion layers each serving as either a source or a drain are formed. The tunnel oxide film is formed on a region of the substrate between the diffusion layers. The charge storage film is formed on the tunnel oxide layer and stores charge. The blocking layer is formed between the charge storage film and a gate electrode and has layers of a first oxide film, a nitride film and a second oxide film to have a thickness of 5 nm or larger but 15 nm or smaller. The nodes allow external application of voltages so that the source and the drain are reversed and allow detection a gate voltage, a drain current and a substrate current.

Semiconductor circuit, D/A converter, mixer circuit, radio communication device, method for adjusting threshold voltage, and method for determining quality of transistor

In general, according to one embodiment, a DA converter configured to convert a digital signal comprising n (n&#x3e;1) bits to an analog current to output the analog current from an output terminal, includes n voltage-current converters. Each of them corresponds to each bit of the digital signal and is configured to generate a current depending on the corresponding bit. A k-th (k is an integer of 0 to n&#x2212;1) voltage-current converter includes a first transistor whose threshold voltage is adjustable. The first transistor includes a semiconductor substrate, a first diffusion region, a second diffusion region, an insulating film, a charge accumulating film, and a gate.

DA converter and wireless communication apparatus

A semiconductor device includes a semiconductor substrate, a source region, a drain region, an insulating film and a gate electrode. The source region is formed in the semiconductor substrate. The drain region is formed in the semiconductor substrate and being separate from the source region. The insulating film is formed between the source region and the drain region and on or above the semiconductor substrate. The insulating film includes lanthanum aluminate containing at least one element selected from Si, Ge, Mg, Ca, Sr, Ba and N. The lanthanum aluminate contains at least one element selected from Ti, Hf and Zr. The gate electrode is formed on the insulating film.

Semiconductor device and method for manufacturing the same

According to an embodiment, an analog-to-digital converter includes a voltage generating unit, and a plurality of comparators. The voltage generating unit is configured to divide a reference voltage by a plurality of variable resistors to generate a plurality of comparative voltages. Each of the plurality of comparator is configured to compare any one of the plurality of comparative voltages with an analog input voltage and output a digital signal based on a result of a comparison between the comparative voltage and the analog input voltage. Each of the plurality of variable resistors includes a plurality of variable resistive elements that are connected in series, and each of the plurality of variable resistive elements has a resistance value that is variably set according to an external signal.

Analog-to-digital converter for dividing reference voltage using plural variable resistors

According to an embodiment, an analog-to-digital converter includes a voltage generating unit to generate comparative voltages; and comparators. Each comparator compares any one of the comparative voltages with an analog input voltage and output a digital signal. Each comparator includes a differential pair circuit to detect a potential difference between two inputs. The differential pair circuit includes first and second circuit portions. The first circuit portion includes a first transistor having a gate to which one input is supplied; and a resistor connected in series with the first transistor. The second circuit portion includes a second transistor having a gate to which the other input is supplied and forms a differential pair with the first transistor; and a variable resistor connected in series with the second transistor. The variable resistor includes variable resistive elements each having a resistance value variably set according to a control signal.

Analog-to-digital converter including differential pair circuit

In a semiconductor device manufacturing method according to an exemplary embodiment, a sulfur-containing film containing sulfur is deposited on an n-type semiconductor, a first metal film containing a first metal is deposited on the sulfur-containing film, a heat treatment is performed to form a metal semiconductor compound film by reacting the n-type semiconductor and the sulfur-containing film, and to introduce sulfur to an interface between the n-type semiconductor and the metal semiconductor compound film being formed.

Semiconductor device manufacturing method

Certain embodiments provide a solid-state imaging device including: a photoelectric converting unit that includes a semiconductor layer of a second conductivity type provided on a semiconductor substrate of a first conductivity type, converts incident light entering a first surface of the semiconductor substrate into signal charges, and stores the signal charges; a readout circuit that reads the signal charges stored by the photoelectric converting unit; an antireflection structure that is provided on the first surface of the semiconductor substrate to cover the semiconductor layer of the photoelectric converting unit, includes a fixed charge film that retains fixed charges being non-signal charges, and prevents reflection of the incident light; and a hole storage region that is provided between the photoelectric converting unit and the antireflection structure, and stores holes being non-signal charges.

Solid-state imaging device

Growing community of inventors

Tokyo, Japan

Masamichi Suzuki