Fuji Electric Co., Ltd.

Sony Semiconductor Solutions Corporation

Origin Electric Company, Limited

Fuji Electric Imaging Device Co., Ltd.

Sony Corporation

Fuji Electric Holdings Co., Ltd.

Fugi Electric Co., Ltd.

Fuji Electric Imaging Devices Co., Ltd.

Origin Company, Limited

Masami Kuroda

Noboru Furusho

Masayo Amano

Youichi Nakamura

Yoshimasa Hattori

Nobuyuki Sekine

Yoshinobu Sugata

Jun Matsuda

Yoshihiro Ueno

Yoichi Nakamura

Kenichi Ohkura

Hiroyuki Tezuka

Haruko Takahashi

Takayuki Suzuki

Haruo Kawakami

Hisato Kato

Keisuke Yamashiro

Yoshimasa Tomiuchi

Midori Aizawa

Yutaka Matsumoto

Takeshi Watanabe

Hironobu Nishimura

Akira Furuta

Kei Yamaguchi

Kyoko Kato

Motohiro Takeshima

Takako Matsumoto

Kunihiro Imai

Osamu Nabeta

Hiroshi Akama

Kenji Kawate

Gaku Shimada

Kazuhiro Kusakawa

Ayako Tutui

A leakage current of a MOS transistor that performs writing is reduced. The resistance change memory includes a memory cell, a write drive unit, a write control unit, and a well potential adjustment unit. The memory cell includes a resistance change element. The write drive unit applies a write voltage to the memory cell to perform writing of data. The write control unit outputs a write control signal for controlling the writing to the write drive unit. The well potential adjustment unit adjusts a well potential of a well region in which an element constituting the write drive unit is arranged according to the write voltage at time of the writing.

Resistance change memory, memory device, and memory system

A logic simulation device according to an aspect of the present disclosure includes an operation model of a resistance-change memory element. The resistance-change memory element is provided between two terminals. The operation model includes a register section for holding data, a truth table, and a determining section. The truth table defines a relationship between signal values of the two terminals, and data writing to the register section and data reading from the register section. The determining section performs determination about the data writing and the data reading on the basis of signal values inputted to the two terminals and the truth table.

Logic simulation device

A memory system according to an aspect of the present disclosure includes a soft error generator that generates write data or read data considering a probability error by using a specific number as a random number. In the memory system, the write data or the read data considering a probability error is generated by using the random number. Herein, whether or not an error occurs is randomly changed depending on the random number. Accordingly, an error stochastically occurs, which makes it possible to reproduce a soft error.

Memory system and memory operation

Provided is a storage apparatus that reduces the power needed to write corrected data back to a memory. The storage apparatus includes a memory and a write control section. The memory stores data in units of multiple cells each representing a predetermined value. The write control section receives write-back data having a specific value in a position corresponding to at least one of the multiple cells, as well as a write-back command regarding the specific value. The write control section performs control to write the specific value only to the cell corresponding to the position indicative of the specific value in the write-back data.

Storage apparatus, storage control apparatus, and storage apparatus control method

A standard potential used for reading is set flexibly according to the state of a storage device. A data memory cell group stores data. A reference memory cell group stores a plurality of reference potentials. A standard potential generating section selects a prescribed number of reference potentials from among the plurality of reference potentials stored in the reference memory cell group and generates the standard potential. A reference potential selection control section controls the selection by the standard potential generating section according to prescribed conditions. A sense amplifier amplifies data read out from the data memory cell group, by using the standard potential as a standard.

Storage device with counter

The reference cells used for reading out data are tested efficiently so as to improve the reliability of the readout data. A memory circuit includes multiple memory arrays, a selection circuit, and a sense amplifier. The selection circuit selects values output from memory cells in any of the multiple memory arrays so as to supply a first value and a second value. A sense amplifier has a first input terminal and a second input terminal. The sense amplifier amplifies and outputs the first value supplied to the first input terminal in reference to the second value supplied to the second input terminal.

Memory circuit

A semiconductor storage device is provided, the semiconductor storage device including: a resistance element configured to generate a reference potential to be supplied to a sense amplifier; and a switch unit having at least two states including a state in which the reference potential to be supplied to the sense amplifier is generated by injection of a current to the resistance element, and a state in which a reference potential generated outside the semiconductor storage device is supplied to the sense amplifier.

Semiconductor storage device, information processing apparatus, and reference potential setting method

To provide a sense amplifier which is capable of implementing a large capacity, a high speed, and an increased data rate of a semiconductor storage device. A sense amplifier is provided, the sense amplifier including: first and second inverters including switches configured to control an activation state and an inactivation state, and having inputs and outputs cross-coupled to each other, respectively; and first and second switches configured to switch between connection and disconnection of each of the cross-coupled first and second inverters with respect to an input from a storage element.

Sense amplifier, semiconductor storage device, information processing apparatus, and reading method

To provide a novel and improved semiconductor storage device which is capable of implementing a large capacity by enabling normal reading of a value from a storage element. A semiconductor storage device is provided, the semiconductor storage device including: a memory element; a reference element in a first resistance state for generating a reference potential for identifying a value held in the memory element; and a reference element in a second resistance state in which a resistance value of the reference element is higher than that in the first resistance state for generating the reference potential, in which when generating the reference potential, the number of reference elements in the first resistance state is larger than the number of reference elements in the second resistance state.

Semiconductor storage device and information processing apparatus

A magnetic recording medium includes a nonmagnetic substrate and at least a magnetic layer, a protective layer, and a lubricating layer provided on the nonmagnetic substrate. The magnetic recording medium is characterized in that the lubricating layer is formed of a lubricating agent represented by general formulas (1), (2) or (3), in which substituents R, R, R, and Rin the lubricating agent represent organic groups, at least one of the substituents Rand Rat the end part of the lubricating agent and the substituents Rand Rcontain a plurality of functional groups, and the shortest distance between the functional groups is a distance of three or more atoms, preferably five atoms. The magnetic recording medium may be used for a heat assisted recording method in which the temperature of the magnetic layer reaches 150&#xb0; C. to 200&#xb0; C. The magnetic recording medium is characterized in that the amount of the lubricating agent volatilized in the lubricating layer is less than 10% of the initial layer thickness.

Magnetic recording medium

A heat-bonding apparatus and method of manufacturing a heat-bonded product not allowing the temperature of the object to be heat-bonded to overshoot greatly from a specified target temperature, and setting the temperature of the object to the target temperature in a shorter time and with higher efficiency and accuracy than the conventional when heat-bonding in vacuum. A heat-bonding apparatus having a vacuum chamber for housing an object to be heat-bonded and a buffer part, a heater for the buffer part in contact with the object in the chamber, a cooler for the buffer part, a sensor for detecting temperature of the object heated through the buffer part and a controller for controlling the temperature of the object to be the target temperature by adjusting heat discharge from the buffer part with the cooler based on the detected temperature of the object.

Heat-bonding apparatus and method of manufacturing heat-bonded products

A heat-bonding apparatus and method of manufacturing a heat-bonded product without overheating during cooling thereof after the completion of the heat-bonding, where the object can be cooled in a shorter time than the conventional when the heat-bonding is performed in a vacuum. A heat-bonding apparatus having a vacuum chamber for housing an object to be heat-bonded and a buffer part, a heater for applying heat to the buffer part placed into contact with the object, an object temperature sensor for detecting a temperature of the object heated through the buffer part, a buffer temperature sensor for detecting a temperature of the buffer part, a vacuum breaker for breaking the vacuum, and a controller for operating the vacuum breaker to break the vacuum when a temperature difference between a temperature detected by the object temperature sensor and a temperature detected by the buffer temperature sensor falls within a range of specified temperature difference.

To provide a thermal processing apparatus where a projection area perpendicular to the axis of a sealing structure and attachment structure of heat radiation heater is decreased and a chamber volume is decreased. The apparatus has a chamber for accommodating a workpiece of a thermal processing object, the chamber having a partition wall for partitioning inside from outside of the chamber, a heat radiation heater disposed penetrating the partition wall, wherein the heater has a ring seal arranged on an outer peripheral surface of the extension section, and hermetically sealing the chamber, and a heat blocking plate arranged between the heat radiation unit and the ring seal in the axial direction of the glass tube, for blocking heat radiated from the heat radiation unit to the ring seal, the heat blocking plate having an inner peripheral surface fitting along the extension section.

Thermal processing apparatus

An excellent soldering apparatus and manufacturing method of soldered product are provided where a workpiece can be efficiently soldered in a short cycle time. The soldering apparatus includes a thermal radiation heater and two coolers for cooling the workpiece which sandwich the heater therebetween. The coolers are movable between a standby position and a cooling position and form a recessed portion in which the heater is placed. The coolers move to the standby position where the coolers are separated from the workpiece and stand by such that the heater is in a state of protruding from the recessed portion while the heater heats the workpiece. The coolers can move from the standby position to the cooling position to cool the workpiece.

Soldering apparatus and manufacturing method of soldered product

Disclosed herein is a storage control device that includes a temperature sensor, temperature information selection section, refresh command reception section and trigger issuance frequency setting section.

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Kawasaki, Japan

Masami Kuroda