Fujitsu Corporation

Kyushu Fujitsu Electronics Limited

Masaki Waki

Mitsutaka Sato

Tetsuya Fujisawa

Toshiyuki Honda

Seiichi Orimo

Katsuhiro Hayashida

Junichi Kasai

Masanori Onodera

Kazuto Tsuji

Yoshiyuki Yoneda

Eiji Watanabe

Tsuyoshi Aoki

Hideharu Sakoda

Ryuji Nomoto

Tadashi Uno

Kazuhiko Mitobe

Hirotaka Sato

Hiroshi Inoue

Akira Takashima

Toshio Hamano

Masaaki Seki

Yoshitsugu Katoh

Tosiyuki Honda

Fumitoshi Fujisaki

Shinichiro Maki

Masao Takehiro

Yukio Gomi

The present invention relates to a leadless surface-mount resin-sealing semiconductor device and a manufacturing method thereof; in a semiconductor device comprising a semiconductor element, a resin package sealing this semiconductor element, a terminal formed on a mount side of this resin package so as to protrude thereon, and a wire electrically connecting this terminal and an electrode pad on the semiconductor element to each other, a heat sink dissipating heat generated in the semiconductor element is provided on an undersurface of the semiconductor element so as to improve a heat-dissipation property.

Semiconductor device, method of manufacturing semiconductor device, lead frame, method of manufacturing lead frame, and method of manufacturing semiconductor device with lead frame

A semiconductor device includes a resin package in which a semiconductor chip is sealed, the resin package having a first surface and a second surface opposite to the first surface; a plurality of leads having inner lead parts connected to the semiconductor chip and outer lead parts extending outside the resin package, the outer lead parts being bent along the shape of the resin package so as to form first terminal parts on the second surface and second terminal parts on the first surface; connection means electrically connecting the semiconductor chip and the leads; and a positioning mechanism provided either on the leads or on the resin package, which positions the outer lead parts by engaging a part of the outer lead parts to the resin package. Further, at least one of the leads and/or connection means is cut so as to electrically disconnect the semiconductor chip and the one of the leads and/or connection elements.

Apparatus for a vertically accumulable semiconductor device with external leads secured by a positioning mechanism

This invention relates to a semiconductor device in which a plurality of outer terminals are arranged in a lattice formation on a flat surface. The semiconductor device has a semiconductor chip, a lead member having a lead portion and an outer connecting terminal connected integrally to the lead portion, the lead portion electrically connected to the semiconductor chip, the lead portion extending outwardly from the semiconductor chip, the outer connecting terminal extending downwardly from the lead portion, a sealing resin sealing the semiconductor chip and the lead portion, a bottom face of the semiconductor chip and a bottom face of the lead portion being exposed from the sealing resin, and an insulating member covering the bottom face of the semiconductor chip and the bottom face of the lead portion. Also, the semiconductor device has a semiconductor chip having a predetermined number of electrode pads, a predetermined number of leads electrically connected to the electrode pads, each of the leads having a projecting terminal portion formed by bending the lead, and a resin portion sealing the semiconductor chip and the leads, wherein the terminal portions are exposed from one face of the resin portion.

Semiconductor device having a lead portion with outer connecting terminals

A semiconductor device having a semiconductor chip and a TAB lead adhering to a surface of the semiconductor chip by a TAB tape which electrically connects an internal terminal arranged in a center part of a surface of the semiconductor chip to an external terminal arranged around a periphery of the semiconductor chip. One embodiment according to the present invention is an LCO semiconductor device having the TAB lead connecting to a lead-frame assembled in an IC package. Another embodiment according to the present invention is a TAB tape of thermo-plasticity comprising a first surface having a first softening temperature and a second surface having a second softening temperature which is different from the first softening temperature.

Semiconductor device having tab-leads and a fabrication method thereof

A semiconductor device includes a semiconductor chip in which electrode pads are formed with a first pitch, leads electrically connected with the electrode pads through lines, and sealing plastic sealing the semiconductor chip. In the semiconductor device, projections used for external connection ports are formed in the leads with a second pitch. The sealing plastic seals the lines connecting the electrode pads and the leads, but the projections are exposed from the sealing plastic.

Semiconductor device, method of manufacturing the semiconductor device,

A lead frame is formed by subjecting a frame base to a forming process, a semiconductor chip is fixed on leads formed in the lead frame and wires are provided in the semiconductor chip, and then a package which accommodates the semiconductor chip is formed; a non-conductive adhesive being provided, before the forming process, on a position on the frame base in which the leads are formed, and unnecessary portions of the frame base and the non-conductive adhesive being removed in the forming process so that the leads having a predetermined configuration and provided with the non-conductive adhesive are formed.

Method of fabricating a semiconductor device

Semiconductor device having tab leads

Method of producing a semicondutor device having a lead portion with

Two semiconductor chips are coupled to outer leads by means of tape leads so that the chips are spaced apart from each other. A space between the chips is filled with a mold resin.

Semiconductor device having a plurality of chips

A semiconductor device includes at least a first semiconductor chip and a second semiconductor chip each having a first surface and a second surface. The second surface of the first semiconductor chip confronts the first surface of the second semiconductor chip. Additionally, the semiconductor device includes a plurality of leads having inner portions and outer portions, where the inner portions of the leads are electrically coupled to selected portions on one of the first and second surfaces of each of the first and second semiconductor chips. An insulator is interposed between the second surface of the first semiconductor chip and the first surface of the second semiconductor chip at portions other than the selected portions. Further, a resin package encapsulates the first and second semiconductor chips so that the outer portions of the leads project outside the resin package.

Semiconductor device having a plurality of semiconductor chips

A process wherein the parts of a lead frame that are outside a cavity are directly supported by ejecting pins extending from above and from below when the lead frame is sandwiched between an upper die and a lower die. The ejecting pins eject the lead frame, on which a package is formed, after a resin mold process.

Process of ejecting an encapsulated semiconductor device from a mold by

Growing community of inventors

Satsuma, Japan

Masaki Waki