Mitsubishi Denki Kabushiki Kaisha

Honda Motor Co., Ltd.

Renesas Electronics Corporation

Nec Corporation

Renesas Technology Corp.

Nippon Avionics Co., Ltd.

Tokyu Construction Co., Ltd.

Masakazu Okada

Hiroshi Kawashima

Keiichi Higashitani

Motoshige Igarashi

Takeshi Kitani

Fumiya Makiguchi

Keiichi Yamada

Masao Kawamura

Takeshi Furusawa

Hiroyuki Chibahara

Nobuo Tsuboi

Naohito Suzumura

Takao Kamoshima

Ryosuke Nakashima

Shoichi Fukui

Jun Otsuki

Manabu Ishikawa

Munehiro Ohshiro

Tetsuhisa Minami

Tetsu Nishioka

Masatsugu Amishiro

A seat back includes: a top-surface seat cover disposed on the top surface; a top-surface cushion pad arranged on a back side of the top-surface seat cover; a contact-surface seat cover disposed on the contact surface; a contact-surface cushion pad arranged on a back side of the contact-surface seat cover and under the top-surface cushion pad; and an airbag having adjustable internal air volume, wherein a lower end portion of the top-surface seat cover is fixed to a first anchorage within the seat back, while covering a lower surface of the top-surface cushion pad, and an upper end portion of the contact-surface seat cover is fixed to a second anchorage within the seat back, while covering an upper surface of the contact-surface cushion pad.

Seat structure

To provide a seat adjustment device capable of flexibly changing a shape of a seat. A seat adjustment device for adjusting a shape of a seat includes a pad including an elastomer, and airbags disposed on a front surface and a rear surface of the pad. The airbags are adjustable in amount of air therein. The airbags include a first airbag disposed on one of the front and rear surfaces and of the pad, and a second airbag disposed on the other. The first airbag is longer than the second airbag in a direction substantially perpendicular to the front and rear surfaces of the pad. The second airbag is longer than the first airbag in a direction substantially parallel to the front and rear surfaces of the pad.

Seat adjustment device

A semiconductor device which is designed based on RDR, suppresses the occurrence of a trouble at the boundary between an active region and a power wire and therearound and is small in size and highly integrated. The semiconductor device includes a first conductive impurity region for functional elements which is formed over the main surface of a semiconductor substrate and a second conductive impurity region for power potential to which power potential is applied in at least one standard cell. It also includes insulating layers which are formed over the main surface of the semiconductor substrate and have throughholes reaching the main surface of the semiconductor substrate, and a conductive layer for contact formed in the throughholes of the insulating layers. The impurity region for functional elements and the impurity region for power potential are electrically coupled to each other through the conductive layer for contact which is formed astride the impurity region for functional elements and the impurity region for power potential.

Semiconductor device

The reliability of a semiconductor device having an embedded wire in the lowest layer wire is improved. In a main surface of a semiconductor substrate, MISFETs are formed and over the main surface, insulating filmsare formed. In the insulating filmsa contact hole is formed and a plug is embedded therein. Over the insulating filmin which the plug is embedded, insulating filmsare formed and an opening is formed in the insulating filmsand a wire is embedded therein. The insulating filmis an etching stopper film when etching the insulating filmin order to form the opening, containing silicon and carbon. The insulating filmhas a high hygroscopicity and the insulating filmhas a low moisture resistance, however, by interposing the insulating filmtherebetween and making the insulating filmhave a higher density of the number of Si (silicon) atoms than that of the insulating film, an electrically weak interface is prevented from being formed.

Semiconductor device having metal contacts formed in an interlayer dielectric film comprising four silicon-containing layers

The semiconductor device includes a semiconductor substrate and, in an element isolating region in the semiconductor substrate, a first active area A/A dummy pattern and a second A/A dummy pattern having a pitch smaller than that of the first A/A dummy pattern. Placement of the first A/A dummy pattern and placement of the second A/A dummy pattern are carried out in separate steps. The semiconductor substrate may be divided into a plurality of mesh regions, and a dummy pattern may be placed in each mesh region according to an area of the mesh region being occupied by an element pattern located therein.

Semiconductor device with a first dummy pattern

An isolation oxide film ( ) has a recess. The bottom of the recess is below the upper surfaces of a P well ( ) and an N well ( ). A capacitor is provided on the bottom of the recess.

Method of manufacturing capacitor

In the semiconductor device manufactured by the manufacturing method of the present invention, the tungsten layer resistant to an impulsive force is formed without the oxide film layer existing below the second pad. Hence, if an external force is applied to the second pad through an opening upon bonding or the like, cracks are hard to occur. Accordingly, it is possible to provide a semiconductor device high in mechanical strength and reliability and a method of manufacturing.

Semiconductor device having a multi-layer pad and manufacturing method thereof

Semiconductor device with dummy patterns

A silicon semiconductor substrate has a plurality of active regions having an impurity region and an isolating region which electrically isolates these active regions from each other. The isolating region is formed of a silicon nitride film. A contact hole penetrates an interlayer insulating film and reaches an impurity region. In this semiconductor device, when the contact hole falls across the impurity region and the isolating region, an amount of erosion in the isolating region is reduced.

Semiconductor device having an improved interlayer contact and manufacturing method thereof

There is described a method of manufacturing a semiconductor device which ensures formation of a step in an alignment mark, to thereby improve the accuracy of alignment. A tungsten layer is formed on an interlayer dielectric film including an opening for use in forming an alignment mark. The tungsten layer is abraded by means of the CMP technique. At this time, the initial thickness of the interlayer dielectric film is made greater than the total sum of the minimum step identifiable for alignment and the amount of abrasion, thus ensuring formation of an alignment step. Further, a gate electrode is removed from the position where a contact alignment mark is formed. Alternatively, an aluminum electrode is removed from a position immediately below a through hole alignment mark.

Method of manufacturing a semiconductor device, and a semiconductor device manufactured thereby

Semiconductor device provided with a field-effect transistor and method of manufacturing the same

In a semiconductor device and a method of manufacturing the same, a dummy region which can suppress occurrence of a parasitic capacity can be provided for reducing a difference in level without increasing manufacturing steps in number. A semiconductor substrate is provided at its main surface with an isolation region formed by a trench, and a dummy region leaving the main surface is formed in the isolation region for the purpose of reducing an influence by the difference in level in a later step. The dummy region includes p- and n-type impurity regions each extending a predetermined depth from the surface. Since a pn junction occurs at the bottom of the impurity region, a depletion layer spreads in the pn junction, and thereby reduces a parasitic capacity between the dummy region and a conductive interconnection located in a crossing direction at a higher position. The impurity regions and source/drain regions of p- and n-channel transistors in active regions are simultaneously formed by impurity implantation.

Semiconductor device with improved planarity and reduced parasitic

Spectral image signals simultaneously provided by two CCD television cameras for an R-image and an IR-image are selected by a visual controller and are sent sequentially to a sending parabolic antenna where two spectral radiometers provided with photosensors measure the amounts of radiation energy of light rays of wavelengths around a wavelength corresponding to the R-image and light rays of wavelengths around a wavelength corresponding to the IR-image to obtain spectral radiation data representing the amounts of spectral radiation energy, respectively. The measured spectral radiation data is integrated and recorded by a data logger and sent through a modem and a connection box to a sending parabolic antenna, and spectral image signals representing the R-image and the IR-image received by a receiving antenna are applied to an image processing unit and the spectral radiation data received by the receiving parabolic antenna is transferred through a connection box and a modem to a computer where an image processing unit calculates a spectral reflection ratio IR/R, where IR is a corrected spectral reflectance of light rays corresponding to the IR-image and R is a corrected spectral reflectance of light rays corresponding to the R-image, and the reflectance ratio IR/R is displayed on a television monitor.

Growing community of inventors

Tokyo, Japan

Masakazu Okada