Panasonic Corporation

Matsushita Electric Industrial Co., Ltd.

Panasonic Intellectual Property Management Co., Ltd.

Masakatsu Maeda

Hisashi Adachi

Shunsuke Hirano

Hiroaki Kosugi

Toshifumi Nakatani

Akinori Daimo

Kenichi Mori

Masanori Hamada

Taichi Ikedo

Kumiko Ito

Kaoru Ishida

Hiroyuki Yoshikawa

Shigeki Nakamura

Hirofumi Nishimura

Naoya Yosoku

Yukio Okazaki

Takayuki Tsukizawa

Mikihiro Shimada

Osamu Kondo

Takahiro Shima

Masahiro Kumagawa

Toru Abe

Yoshito Hirai

Takako Tsubaki

Fumioki Ichihara

Norihisa Yoshida

Rika Tezuchi

There is provided a detection device that includes: a position estimator that estimates a candidate position of a crosswalk in a movement direction of a vehicle and estimates a length of the crosswalk and an intersecting angle between the crosswalk and a roadway using the candidate position; a corrector that corrects the numbers of periods and widths of two basis functions based on the estimated length of the crosswalk and the estimated intersecting angle, the two basis functions corresponding to intervals of white lines of the crosswalk and are orthogonal to each other; and a crosswalk detector that detects whether or not the crosswalk is present using both image data which include the candidate position and the two corrected basis functions.

Detection device and detection method

A bias circuit comprises: a first circuit that comprises a first resistor and a decoupling capacitor; a bias voltage generation circuit that comprises a first transistor being connected to the first circuit; one or more switches; a first replica circuit comprising a second circuit and a second transistor, the second circuit comprising a second resistor and a capacitor, the second transistor being connected to the second circuit; a second replica circuit comprising a third transistor; a comparator that makes a comparison between a pseudo-bias voltage and a reference voltage; and a control circuit that controls the one or more switches on the basis of the comparison result to reduce the amount of the current flowing through the first transistor.

Bias circuit for use with amplifier circuit, control method thereof, and signal amplifier

A transmitting apparatus and transmission method are capable of easily and correctly mixing an in-phase component and a quadrature-phase component in a quadrature modulator. A local signal with a duty ratio of 25% or smaller is generated without using frequency which is a multiple of frequency of the local signal. Without providing switches in series to the outputs of I and Q amplifiers, a duty ratio of 25% or less is obtained. for the local signal, and class-D unit amplifiers are operated such that one of the I amplifier and the Q amplifier is connected to the output side in any state regardless of whether an output power control signal is at an on-level or an off-level. In producing the 25% duty ratio, a local signal with a 50% duty ratio is converted so as to have a duty ratio of 25% by I and Q duty converters.

Transmitting apparatus and transmission method

A transmission apparatus includes a digital amplifier having a plurality of class-D amplifiers connected in parallel to each other, each of the class-D amplifiers including a logic circuit that processes input signals from two input terminals and outputs the input signals to one of two output terminals, according to a selection signal, and including capacitors connected in series to the two output terminals, respectively, a first selection circuit that outputs either an in-phase component or a quadrature component of a transmission signal to the digital amplifier depending on the selection signal, and a second selection circuit that outputs either an in-phase component carrier signal or a quadrature component carrier signal to the digital amplifier depending on the selection signal.

Transmission apparatus and transmission method

The present invention provides a CMOS-inverter-type frequency divider circuit that can further reduce power consumption. The CMOS-inverter-type frequency divider circuit includes: a plurality of CMOS inverters that contribute to realizing a frequency division function; a frequency division control section for performing control such that some or all of the plurality of CMOS inverters are intermittently driven at the respective different timings in accordance with an input signal; and a drive power supplying section for supplying powers for driving the plurality of CMOS inverters, and for, based on state information indicating whether VCO sub band selection or normal transmission is performed, switching some or all of the powers for the plurality of CMOS inverters between the VCO sub band selection and the normal transmission.

CMOS-inverter-type frequency divider circuit, and mobile phone including the CMOS-inverter-type frequency divider circuit

A digital FLL/PLL is provided which is capable of converging an oscillation frequency from a VCO to a desired frequency at a high speed even without setting a damping factor corresponding to each VCO gain. A digital FLL/PLL of the present invention includes: a comparator for comparing a channel signal to a loopback signal having an oscillation frequency to generate a signal error; a digital loop filter for generating a control voltage that determines the oscillation frequency, on the basis of the signal error; a VCO for controlling an oscillation frequency on the basis of the control voltage; a loopback path through which the oscillation frequency generated by the VCO is outputted as the loopback signal to the comparator; and a control section for monitoring the signal error, and controlling the digital loop filter such that the oscillation frequency of the VCO becomes a stationary state, when detecting that the signal error meets a predetermined condition after the channel signal is switched.

Digital frequency/phase locked loop

Provided is a transmitter including a polar modulation circuit which adjusts a timing lag between an amplitude component and a phase component more accurately than a conventional art. The polar modulation circuit includes: a first calculator for performing an exclusive OR logical operation between the amplitude component before and after being inputted to the first processing section; a second calculator for performing an exclusive OR logical operation between the phase component before and after being inputted to the second processing section; and a delay fluctuation detection/compensation section for obtaining a delay time of the amplitude component based on an amount of output accumulation of the first calculator; obtaining a delay time of the phase component based on an amount of output accumulation of the second calculator; detecting an amount of delay fluctuation by using the delay times; and adjusting timings of the amplitude component and the phase component.

Transmitter including polar modulation circuit

An amplitude modulator comprises: a signal processing section for receiving a source signal for wide bandwidth use, splitting the source signal into two source signals for lower frequency use and for higher frequency use, respectively, signal processing the two source signals individually, and outputting a lower-frequency-use source signal and a higher-frequency-use source signal; a first modulation section for modulating the lower-frequency-use source signal and outputting a lower-frequency-use modulation signal; a second modulation section for modulating the higher-frequency-use source signal and outputting a higher-frequency-use modulation signal; a synthesis output section for inputting the lower-frequency-use modulation signal to a first input terminal, the input thereof causing extraction of only a lower-frequency component, for inputting the higher-frequency-use modulation signal to a second input terminal, the input thereof causing extraction of only a higher-frequency component, for synthesizing the higher-frequency component and the lower-frequency component, and for outputting a modulated signal corresponding to the source signal for wide bandwidth use, to a next step.

Amplitude modulator

A semiconductor apparatus includes a signal sourcethat outputs a signal of predetermined frequency, a frequency dividerthat receives the output signal of the signal source and is capable of switching the output signal to two or more frequency division ratios, a delta-sigma modulatorthat controls the frequency division ratio of the frequency divider, and a bandpass filterthat receives an output of the frequency divider. The frequency of the input signal of the frequency divider is divided by the frequency division ratio controlled by the delta-sigma modulator, and quantization noise appearing in the output of the frequency divider generated by the delta-sigma modulator is attenuated with the bandpass filter. The semiconductor apparatus easily can convert a signal output by a single signal source to a signal of predetermined frequency and supply a plurality of signals of predetermined frequency using a simple configuration with reduced chip size.

Semiconductor apparatus and radio circuit apparatus using the same

Provided is a PLL oscillation circuit that can reduce the variability of modulation sensitivity of a VCOand obtain a desired output amplitude quickly with high precision. An amplitude detectordetects an output amplitude of the VCO. An amplitude controllercontrols a current value of a variable current sourceso as to have an output amplitude of the VCOdetected by the amplitude detectorto be a desired amplitude. A LPFis connected between the amplitude controllerand the variable current source. A switchconnects or disconnects the LPFbetween the amplitude controllerand the variable current source. The amplitude controlleris connected to the variable current sourcethrough either the LPFor the switching switch

PLL oscillation circuit, polar transmitting circuit, and communication device

A transmission circuit alleviates the frequency characteristics of a group delay and an attenuation amount in a transmission signal band and expands a dynamic range to a high frequency band. A ladder-type resistance-type attenuator includes switching elements, 2R resistor elements and R resistor elements. The 2R and R resistor elements are respectively connected to variable capacitor elements in parallel. The variable attenuator having such a connection structure is connected to an amplitude modulation loop of the transmission circuit. By controlling the capacitance value of the variable capacitor elements using the capacitance value control section when the switching elements are ON/OFF switched based on the transmission power control signal, the influence of parasitic capacitances of the variable capacitor elements is suppressed and the group delay between the amplitude modulation and the phase modulation is reduced.

Transmission circuit by polar modulation system and communication apparatus using the same

A transmission circuit operates with high efficiency and low distortion. An amplitude and phase extraction section extracts amplitude data and phase data from input data. A phase modulation section phase-modulates the phase data to output a resultant signal as a phase-modulated signal. An amplifier section amplifies the phase-modulated signal to output a resultant signal as a transmission signal. An amplitude control section supplies, to the amplifier section, a voltage controlled in accordance with an AC component represented by a fluctuation component of the amplitude data and a DC component represented by an average value level of the fluctuation component of the amplitude data.

Transmission circuit and communication device

Transistors Mand Mare cross-coupled to each other so as to form a negative resistance circuit. First and second variable capacitor sectionsandare connected in parallel with an inductor circuit so as to form a parallel resonant circuit. A first reference voltage Vrefand a control voltage VTcorresponding to a carrier wave component are fed to both terminals, respectively, of each of variable capacitors VCand VCincluded in the first variable capacitor sectionA second reference voltage Vrefand a control voltage VTcorresponding to a modulated wave component are fed to both terminals, respectively, of each of variable capacitors VCand VCincluded in the second variable capacitor sectionA DC control sectionincludes a resistance Rinterposed between the second reference voltage Vrefand a common connection point of resistances Rand Rand a capacitor Cfor feeding only an AC component included in the modulated wave component to the common connection point of the resistances Rand RThus, a DC voltage, on which the AC component included in the modulated wave component is superimposed, is changed from a certain DC bias to a DC bias of the second reference voltage Vref

Direct modulation type voltage-controlled oscillator using MOS varicap

A modulation apparatuscomprises a monitoring sectionoperable to monitor information about a control voltage applied to a VCOas control voltage information, during any period, when a low-frequency signal having a frequency within a loop band of a PLL circuit is input at least before an LPF, a correction table storing sectionoperable to associate the control voltage information monitored by the monitoring sectionas information about a control voltage after correction with information about a control voltage before correction, and store the associated information as a correction table, and a correction sectionoperable to correct a control voltage applied to the VCObased on the correction table stored in the correction table storing section.

Modulation apparatus capable of correcting non-linearity of voltage controlled oscillator

An FM modulator measuring an f-V characteristic of a voltage controlled oscillator in a reduced time period. In the FM modular a characteristic measurement time control sectionnotifies a correction sectionof a time at which a measurement of the f-V characteristic of a voltage controlled oscillatoris to start and a time at which the measurement of the f-V characteristic of the voltage controlled oscillatoris to and while a carrier wave frequency is being changed to a predetermined frequency. Thus, the correction sectionmeasures the f-V characteristic of the voltage controlled oscillatorin a reduced time period.

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Kyoto, Japan

Masakatsu Maeda