Matsushita Electronics Corporation

Masaji Asaumi

Yuji Matsuda

Hiroyuki Okada

Wataru Kamisaka

Takao Kuroda

Sumio Terakawa

Yoshikazu Sano

Yoshikazu Chatani

Eiichi Tsujii

A solid-state image device comprises a plurality of photoelectric converters arranged on a semiconductor substrate; a plurality of vertical charge coupled devices (CCDs) that receive signal charges from the photoelectric converters and transfer the signal charges; a horizontal CCD that receives the signal charges transferred by the vertical CCDs and transfers the signal charges in the direction crossing the vertical CCDs; and a signal output circuit that receives the signal charge transferred by the horizontal CCD and outputs the signal voltage corresponding to the signal charge. The vertical CCD has a normal mode for transferring the signal charges synchronizing with the horizontal CCD and a high-speed mode for transferring the signal charges quickly without synchronizing with the horizontal CCD. A potential barrier region and a charge drain region are formed along the side of the horizontal CCD opposite to the connection side with the vertical CCDs. The charge drain region has a resistance R and a capacitance C such that their product value RC is smaller than substantially ten times of the transfer period of the vertical CCD in the high-speed mode.

Solid-state image device

Solid-state image sensing apparatus and manufacturing method thereof

A semiconductor device and a method of inspecting the same are described. The semiconductor device does not need voltage adjustment of an external driver circuit, since it contains a voltage generator to inspect and memorize the best value of voltage by controlling from outside. The voltage generator has a plurality of capacitors whose electrodes of one side are connected to a common node, a potential changing circuit to change the potential to which the other electrodes of these capacitors are connected respectively, and a buffer amplifier whose input power is the voltage generated in the common node. The output power of the buffer amplifier is connected to a semiconductor integrated circuit. The potential changing circuit is provided to change the potential to which the electrode of each capacitor is connected to a source potential or to a ground potential depending on the connection of the fuse connected between the source and each of the capacitors.

Semiconductor device containing an adjustable voltage generator

The present invention relates to a charge transfer device having high transfer efficiency without leaving over signal charges, a charge transfer device substantially shortened in the gate length so as to enhance the transfer speed, and a method of manufacturing and a method of driving such device. In the charge transfer device of the invention, the n.sup.- diffusion layer is formed on the semiconductor substrate. In the surface region of the n.sup.- diffusion layer, a plurality of n diffusion layers are formed at equal intervals. The interval of the adjacent n diffusion layers is about 5 to 10 .mu.m. On the n.sup.- diffusion layer, an insulation film is formed. On the insulation film, transfer electrodes having two different shapes are formed. The transfer electrodes of these two types are alternately arranged. These transfer electrodes differ in length. The length of the longer transfer electrodes is about twice the length of the shorter transfer electrodes. Furthermore, the right end of the n diffusion layer nearly coincides with the right end of the longer transfer electrodes formed on the gate oxide film in the spatial position.

Charge transfer device, process for its manufacture, and method of

A charge-coupled device comprises transfer gate electrodes separated from a substrate by a multilayer insulating film, and gate electrodes of MIS transistors separated from the substrate by a single layer insulating film. The multilayer insulating film comprising at least a lower silicon oxide layer of 10 nm to 200 nm thickness and an upper silicon nitride layer of 10 nm to 100 nm thickness. Since each of the gate insulating films of the MIS transistors is the same layer as the lower silicon oxide layer, there occurs no degradation in the transistor characteristics due to the surface states or the trapping states present within the silicon nitride layer.

Method of making charge-coupled device and solid-state imaging device

A charge-coupled device comprises transfer gate electrodes separated from a substrate by a multi-layer insulating film, and gate electrodes of MIS transistors separated from the substrate by a single layer insulating film. The multilayer insulating film comprising at least a lower silicon oxide layer of 10 nm to 200 nm thickness and an upper silicon nitride layer of 10 nm to 100 nm thickness. Since each of the gate insulating films of the MIS transistors is the same layer as the lower silicon oxide layer, there occurs no degradation in the transistor characteristics due to the surface states or the trapping states present within the silicon nitride layer.

Growing community of inventors

Kyoto, Japan

Masaji Asaumi