Elpida Memory, Inc.

Toshiba Memory Corporation

Masahito Hiroshima

Takashi Nishida

Hiroshi Nomura

Yasuo Matsuoka

An imprint apparatus according to one embodiment includes a contact processing unit and a defect determination unit. The contact processing unit brings a template pattern formed on a front surface of a template into contact with resist placed on a substrate. The defect determination unit determines a defect in an imprint process, on the basis of force which is generated from at least one of the template, the resist, and the substrate, during the imprint process.

Imprint apparatus and imprint method

A phase shift mask is provided which includes: a substrate that is transparent to irradiation light, a shielding region formed on the substrate and in which a line pattern is formed, and a first transparent region and a second transparent region located on respective opposite sides of the shielding region on the substrate, wherein a phase shifter is formed under the first transparent region, and the phase shifter has a side wall including an outward protruding bent portion. The phase shifter can be formed by, for example, irradiating and scanning a predetermined region of the substrate with femtosecond pulse laser light applied from above the substrate.

Phase shift mask and method for manufacturing the same, and method for manufacturing integrated circuit

A reticle pattern defect correcting apparatus comprises a lithographic emulation system including an optical emulation system and a micromachining defect correcting system including a reticle defect correcting mechanism with a cantilever. Since correction of a reticle pattern defect is carried out while the transferred image is being observed in real time by the optical emulation system, it is possible to achieve an efficient reticle pattern correction while avoiding overcorrection and other problems.

Apparatus including defect correcting system which repeats a correcting of a reticle pattern defect and a correcting method using the apparatus

A light-transmitting mold structure having a mold pattern corresponding to a portion to form a pattern by nanoimprint and a conductive film pattern corresponding to a portion to form a pattern by nonadiabatic near-field exposure is used to irradiate UV light from a back surface of the mold structure and to perform nonadiabatic near-field light exposure in an imprint process so that all patterns having various sizes for simulating various designs can be faithfully transferred by a single imprint process (imprint & UV exposure).

Fine resist pattern forming method and nanoimprint mold structure

A semiconductor device and a manufacturing method thereof in which the peripheral length of an aperture and the mechanical strength of cylinders in a cell can be increased without changing the occupation rate of patterns in the cell. By forming a slit in the middle of each mask pattern so as not to expose parts of wafer, the aperture of the wafer becomes nearly cocoon-shaped with a constriction in the middle. Thereby, the peripheral length of the aperture can be increased without changing the occupation rate of the mask patterns in a cell. Further, the shape of the bottom of the aperture also becomes nearly cocoon-shaped with a constriction in the middle, and therefore it is possible to increase the mechanical strength of cylinders.

Semiconductor device and manufacturing method thereof

This VSB lithography system includes a first, second and third aperture for forming a single electron beam in each of the rectangular opening portion that are provided, and draws a figure pattern using the single electron beam formed by passing the beam through the first, second and third aperture in sequence. Each of the first, second and third aperture has a mechanism for rotationally driving the aperture around an optical axis up to an arbitrary angle from 0 to 360&#xb0;. Further, in the third aperture, a mechanism for varying the opening slit width of the rectangular opening portion is provided.

Variable shaped electron beam lithography system and method for manufacturing substrate

In a method of manufacturing a semiconductor device including a wiring pattern in the form of a linear line having an intermediate portion with a locally different line width, the wiring pattern being formed by using a resist pattern, the resist pattern is formed through an exposure step using a mask pattern prepared by dividing the wiring pattern in a mask into a simple line portion and a rectangular pattern portion having a different line width, and interposing between the line portion and the rectangular pattern portion a slit having a predetermined separation width of not larger than 0.22&#xd7;&#x3bb;/NA (&#x3bb; represents a wavelength of exposure light, and NA represents a numerical aperture of a projection lens).

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Tokyo, Japan

Masahito Hiroshima