Micron Technology Incorporated

Masahiro Yokomichi

Sangmin Hwang

Kyuseok Lee

Takefumi Shirako

Semiconductor devices including active regions and gate electrodes are disclosed. An example semiconductor device according to the disclosure includes a gate electrode extending in a first direction, and first and second active regions extending in a second direction. The gate electrode has a side extending in the first direction. The first active region includes: a first center portion having a first width in the first direction; and a first end portion disposed at a first end of the first center portion, and having a second width in the first direction that is greater than the first width. The second active region includes: a second center portion having a third width in the first direction. The gate electrode overlaps along the side with portions of the first end portion and the second center portion.

Memory subword driver layout

In some examples, a subword driver block of a memory device includes a plurality of active regions of a first type and a plurality of active regions of a second type adjacent to the plurality of active regions of the first type. The subword driver block further includes a plurality of first gate electrodes overlapping with the plurality of active regions of the first type to form a plurality of first transistors, and a plurality of second gate electrodes overlapping with the plurality of active regions of the first type to form a plurality of second transistors. Each of the second transistors is shared by a first subword driver and a second subword driver. Each of the second transistors may include a drain and a source respectively coupled to a first and second word line, which are driven by the first subword driver and the second subword driver, respectively.

Semiconductor memory devices including subword driver and layouts thereof

Some embodiments include an integrated assembly with a semiconductor base having a horizontally-extending upper surface, and having a recessed region. A transistor gate is supported by the semiconductor base. The transistor gate has a first segment over the horizontally-extending upper surface, and has a second segment over the recessed region. The first segment has a first vertically-extending surface along an outer edge. The second segment has a ledge along an edge of the recessed region. The ledge has an upper surface which is lower than the horizontally-extending upper surface. The second segment has a second vertically-extending surface extending upwardly from an inner portion of the ledge. A first spacer is along the first vertically-extending surface. A second spacer is along the second vertically-extending surface. The second spacer has a bottom edge beneath the horizontally-extending upper surface of the base.

Integrated assemblies having a portion of a transistor gate extending into a recessed region of a semiconductor base, and methods of forming integrated assemblies

Growing community of inventors

Hiroshima, Japan

Masahiro Yokomichi