Max-planck-gesellschaft Zur F&#xf6;rderung Der Wissenschaften E. V.

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Media Lario S.r.l.

Dolgoshein, Boris Anatolievich

Masahiro Teshima

Razmik Mirzoyan

Boris Anatolievich Dolgoshein

Razmick Mirzoyan

Pavel Zhorzhevich Buzhan

Robert David Banham

David Gascon Fora

Sergio Gómez Fernández

Guiseppe Valsecchi

Elena Viktorovna Popova

Leonid Anatolievich Filatov

Andreu Sanuy Charles

Sergey Nikolaevich Klemin

Anatoliy Dmitrievich Pleshko

Valentin Nikolaevich Staroseltsev

Elena Popova

Vladimir Alexandrovich Kaplin

Stifutkin Alexey Anatolievich

Alexey Anatolievich Stifutkin

Anatoly Pleshko

Boris Anatollevich Dolgoshein

Elena Viktorovna Osenny Bulvar 10-118 Popova

A semiconductor photomultiplier module () comprises a first semiconductor chip () disposed in a first plane and comprising an array () of single-photon avalanche diodes (SPAD), a second semiconductor chip () disposed in a second plane and comprising a first part of an electronic read-out circuit, and a third semiconductor chip () comprising a second part of the electronic read-out circuit, wherein the first semiconductor chip () and the second semiconductor chip () are arranged in a stacked relationship and vertical electrical interconnects () are arranged to electrically interconnect the first semiconductor chip () with the second semiconductor chip ().

Semiconductor photomultiplier module comprising a stacked configuration of a sensor chip and electronic readout chips

A mirror includes a carrier, a reflecting layer disposed above a main face of the carrier, and a transparent layer disposed above the reflective layer. The carrier includes a base body, and the base body includes one or more of a material comprising a density in a range from 0.1 to 1.0 g/cm, a porous material, a foamed material, a material comprising a structure containing closed cells, a material comprising a honeycomb structure, or a structure containing carbon fibers.

Mirror with increased form stability and longevity and a method of fabricating the same

The silicon-based photomultiplier device comprises a substrate (), a first layer () of a first conductivity type, a second layer () of a second conductivity type formed on the first layer, wherein the first layer () and the second layer () form a p-n junction, wherein the first layer () and the second layer () are disposed on or above the substrate (). A material layer () between the substrate () and the first layer () fulfills the function of a light absorber, thereby efficiently suppressing crosstalk between adjacent cells of the device. Material layer () may further serve as an electrode for readout of electrical signals from the device.

Silicon photoelectric multiplier with very low optical cross-talk and fast readout

A silicon-based photoelectric multiplier comprises a plurality of cells and a number of read-out lines, and at least one of a number read-out pads or a ring-like line, wherein the plurality of cells may be divided into a number of segments, and each one of the read-out lines may be electrically connected with the cells of at least one segment.

Silicon photoelectric multiplier with multiple read-out

A cell for a silicon based photoelectric multiplier may comprise a substrate of a second conductivity type, a first layer of a first conductivity type, and/or a second layer of the second conductivity type formed on the first layer. The first layer and the second layer may form a first p-n junction, and the substrate may be configured such that in operation of the photoelectric multiplier from a quantity of light propagating towards a back side or side walls of the photoelectric multiplier, a negligible portion returns to a front side of the photoelectric multiplier.

Silicon photoelectric multiplier with optical cross-talk suppression due to properties of a substrate

A cell for a silicon-based photoelectric multiplier may comprise a first layer of a first conductivity type and a second layer of a second conductivity type formed on the first layer. The first layer and the second layer may form a first p-n junction. The cell may be processed by an ion implantation act wherein parameters of the ion implantation are selected such that due to an implantation-induced damage of the crystal lattice, an absorption length of infrared light of a wavelength in a range of &#x2dc;800 nm to 1000 nm is decreased.

Silicon photoelectric multiplier

The present disclosure relates to photodetectors with high efficiency of light detection, and may be used in a wide field of applications, which employ the detection of very weak and fast optical signals, such as industrial and medical tomography, life science, nuclear, particle, and/or astroparticle physics etc. A highly efficient CMOS-technology compatible Silicon Photoelectric Multiplier may comprise a substrate and a buried layer applied within the substrate. The multiplier may comprise cells with silicon strip-like quenching resistors, made by CMOS-technology, located on top of the substrate and under an insulating layer for respective cells, and separating elements may be disposed between the cells.

Highly efficient CMOS technology compatible silicon photoelectric multiplier

The invention relates to high-efficient light-recording detectors and can be used for nuclear and laser engineering, and in technical and medical tomography etc. The inventive silicon photoelectric multiplier (variant 1) comprising a p++ type conductivity substrate whose dope additive concentration ranges from 10to 10cm &#x2212;and which consists of cells, each of which comprises a p&#x2212; type conductivity epitaxial layer whose dope additive concentration is gradually changeable from 10to 10cmand which is grown on the substrate, a p&#x2212; type conductivity layer whose dope additive concentration ranges from 10to 10cmand a n+ type conductivity layer whose dope additive concentration ranges from 10to 10cm, wherein a polysilicon resistor connecting the n+ type conductivity layer with a feed bar is arranged in each cell on a silicon oxide layer and separating elements are disposed between the cells. Said silicon photoelectric multiplier (variant 2) comprising a n&#x2212; type conductivity substrate to which a p++-type conductivity whose dope additive concentration ranges from 10-10cm&#x2212;is applied and consists of cells, wherein in each cell a polysilicon resistor is placed on a silicon oxide layer and separating elements are disposed between the cells.

Silicon photoelectric multiplier (variants) and a cell for silicon photoelectric multiplier

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Unterschleissheim, Germany

Masahiro Teshima