Sony Corporation

Masahiro Shigenobu

Kensuke Fujimoto

Koji Inoue

Hirofumi Todo

Chiaki Nonaka

Makoto Yamada

Seiji Ohbi

Yasuaki Maeda

Hideki Mawatari

The present invention relates to a skew control method and a skew control unit by which stable skew control can be performed with a simple configuration without the need for a dedicated skew sensor. Focus drive voltages Vand Vare measured at a plurality of points Pand Pset by moving an optical pick-upin the radial direction of an optical discin a state where a focus servo of the optical pick-upis ON, and skew angle control is performed so that Vand Vare equal to each other.

Skew control method and skew control unit

A reproducing apparatus for reading, or a recording apparatus for writing, data from or to a disc having pre-formed thereon a pair of concentrical or spiral tracks adjacent to each other and to which a common address is given, is adapted to control the time at which a read or write head is moved from one to the other of the pair of tracks or vice versa.

Recording apparatus and method, and reproducing apparatus and method

The present invention relates to an information processing apparatus wherein a device connected to a host computer enters a sleep mode in accordance with a judgment made by the device itself, and the device is restored to its original operating state by a hardware reset signal received from the host computer. To put it in detail, if no data is exchanged through an ATAPI command data I/F for at least a predetermined period of time, a CPU of the device outputs a sleep mode to a clock generator and a drive power supply block to put the device in a sleep mode. When a CPU of the host computer outputs a HRST signal in this mode to the device through an ATAPI bus to restore the device from the sleep mode, an IRQ signal reception unit of the CPU employed in the device receives this HRST signal. Receiving the HRST signal, the CPU of the device issues a command requesting restoration from the sleep mode to the clock generator and the drive power supply block. The present invention can be applied to an optical disc drive.

Receiving a reset signal directly from an ATA or ATAPI bus of a host computer without passing through an interface processing unit for termination of a half halted state

A data access controller has its SRAM adapted to hold two ECC blocks so that the SRAM is used efficiently for multiple kinds of processes. At playback of data, writing of ECC block A from the demodulator and the ECC process for ECC block B begin simultaneously. When the ECC process ends, release of the ECC block B to the outside begins. When the writing of the ECC block A ends, the ECC process for the ECC block A begins and, at the same time, writing of ECC block B from the demodulator begins.

Data access controller and data access control method

This invention relates to a recording medium, data transmission apparatus, data receiver, and optical disk unit, and particularly applies to a system which transmits video data and other data or records them on an optical disk in a predetermined block unit, and permits each frame to be easily and correctly located by low volumes of identification data. At least contiguous synchronization patterns or/and contiguous synchronization patterns with one synchronization pattern interleaved therebetween are assigned with unique combinations.

Recording medium, data transmission apparatus, data receiver, and optical disk unit

An apparatus and method are provided for moving an optical head to a desired track on a disk shaped recording medium having a pair of spiral tracks. A common address is recorded on the pair of spiral tracks. The addresses of the tracks before and after the access process are compared. Based on this comparison, a judgment is made as to whether the optical head has landed on a spiral track having a common address or a track having another address after the access process.

Apparatus and method for positioning an optical head over a disk having

A storage medium reproduction apparatus for reproducing data from a storage medium for storing data which are divided into frames of a predetermined length, each of the frames comprising a synchronizing pattern. The apparatus comprises a synchronizing pattern detection circuit for detecting synchronizing patterns and a frame determination circuit for determining a currently reproduced frame on the basis of regularity of the synchronizing patterns detected by the synchronizing pattern detection circuit.

Error-correcting storage medium reproduction apparatus and method using

An apparatus and method are provided for locating a desired track on a disk shaped recording medium. The disk has a first pre-group and a second pre-group. At least one of the pre-groups has encoded address information shared by at least one track on the inner side of the pre-group, and shared by at least one track on an outer side of the pre-group. A desired track is located based on changes in address information detected during or after a track jump.

A data access controller has an SRAM adapted to hold two ECC blocks so that the SRAM is used efficiently for multiple kinds of processes. At playback of data, writing of ECC block A from a demodulator and an ECC process for ECC block B begin simultaneously. When the ECC process ends, release of the ECC block B to the outside begins. When the writing of ECC block A ends, the ECC process for the ECC block A begins and, at the same time, writing of ECC block B from the demodulator begins.

A sync signal is inserted to a signal modulated by RLL (1,7), thereby forming one sector. One cluster is formed by 16 sectors, a preamble, and a postamble. Further, DSV control bits are inserted to data after the modulation. A frequency of recording data concerning the bit number of one cluster after the DSV control bits were inserted is equal to 8.817984 MHz. A frequency of a read clock of the physical address which is previously recorded on an optical disk is equal to 24.192 kHz. By dividing a frequency of 17.635968 MHz into 1/2, a clock signal of a frequency equal to the channel bit frequency can be formed. By dividing it into 1/729, a clock signal of a frequency of a read clock can be formed.

Optical disk apparatus and data recording method

A window signal generating circuit generates a window 1 signal in synchronization with a reference counter and generates a window 2 signal by inverting the window 1 signal. If a detected synchronizing signal detected by a synchronizing signal detecting circuit is synchronized with a window 1 signal, a resynchronizing signal output circuit outputs a resynchronizing signal in synchronization with the window 1 signal. If a window 1 signal and a synchronizing signal are not synchronous, that is, if a window 2 signal is at a high level and a synchronizing signal is detected, another reference counter is synchronized with the synchronizing signal, and if a synchronous state continues by a predetermined frequency or more, the reference counter is synchronized with the timing of another reference counter. A synchronizing signal can be promptly fetched by the above processing.

Method for regenerating synchronizing signal by judging whether or not

A simple device and method for accessing a desired track of an optical disk device or the like, wherein address information is encoded on at least one of two pre-groups. One or more tracks adjacent to the pre-groups have the same address. Tracks are located and identified based on changes in address information detected during or after a track jump.

Apparatus and method for identifying and accessing a desired track of an

A modulation device and a demodulation device suitably performing DSV control while reducing the size and lowering the price of the hardware. Recording data is modulated at a modulator. In a DSV calculator, the DSV value of a modulated data is calculated in units of 1 DSV frame. A comparator outputs a sign comparison result of a DSV value cumulatively added from the start of recording and a DSV value to a DSV control bit insertion unit. The DSV control bit insertion unit inserts bits of DSV control data in accordance with the comparison result at a predetermined insertion position of the modulated data delayed by exactly an amount of 1 DSV frame. Thereafter, the modulated data is subjected to NRZ modulation.

Modulation device and demodulation device and methods of the same

An ECC encoder adds sync patterns to a preamble part and a data part in respectively different sequences. A modulator modulates data to which sync patterns have been added by the ECC encoder, and the result is recorded on an optical disk. The playback RF signal output by the optical disk is demodulated by a demodulator, and the sync patterns inserted in the signal are detected. From the combinations of detected sync patterns, the demodulator 12 identifies whether a currently reproduced frame is the preamble part or the data part, and from the identification result, playback data is sequentially stored in a predetermined area of a SRAM. It is thus performed to identify a preamble part from a reproduced RF signal, and accurately extract one block of data.

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Kanagawa, Japan

Masahiro Shigenobu