Microwave Technology, Inc.

Varian Associates, Inc.

Avantek, Inc.

Masahiro Omori

Edward Bryant Stoneham

David R Decker

Arthur D Herbig

James N Wholey

J Ross Anderson

A protective coating useful as a passivation layer for semiconductor devices incorporates a thin film of an amorphous diamond-like carbon. In one implementation, a thin film of amorphous silicon is deposited over the carbon material. The semiconductive passivation coating prevents electrical shorts, dissipates charge build-up and protects against chemical contamination.

Protective coating useful as a passivation layer for semiconductor

A protective coating useful as a passivation layer for semiconductor devices incorporates a thin film of an amorphous diamond-like carbon. In one implementation, a thin film of amorphous silicon is deposited over the carbon material. The semiconductive passivation coating eliminates electrical shorts, dissipates charge build-up and protects against chemical contamination.

Protective coating useful as passivation layer for semiconductor devices

One embodiment of a process in accordance with our invention includes the step of forming a P type region on a semiconductor substrate. After the P type region is formed, an N type layer is epitaxially grown on the P type region. A Schottky gate is then formed on the N type epitaxial layer. A first portion of the epitaxial layer serves as a transistor source, a second portion of the epitaxial layer serves as the transistor drain, and a third portion of the epitaxial layer serves as the channel. Of importance, the P type semiconductor region helps prevent various short channel effects caused when current carriers flowing between the source and drain flow too far from the Schottky gate.

Subchannel doping to reduce short-gate effects in field effect

A method of fabricating gate electrodes on microwave field effect transistors is described. A first layer of photo-resist is deposited and photolithographically defined on top of a semiconductor material with openings in the photoresist, corresponding to the gate electrode. In one embodiment, when drain and source electrodes have been previously formed, additional openings in the first layer of photoresist are defined that approximately overlay the drain and source electrodes. A metal layer is then deposited on top of this structure. A second layer of photoresist is then deposited and photolithographically defined on top of the first metal layer, with larger openings which overlay the openings in the first layer of photoresist. The thickness of the gate electrode, and in one embodiment, the sections overlaying the drain and source electrodes, is then increased by plating gold into the openings in the second layer of photoresist.

Low-resistance, fine-line semiconductor device and the method for its

A microwave field effect transistor (FET) comprises source, gate, and drain electrodes deposited on an epitaxial layer grown on a semi-insulating substrate. The FET has lowered thermal resistance, lowered source lead inductance, and lowered gate series resistance, together with concomitant performance improvements, through the use of a novel source electrode connection which comprises a deposited or plated through metallic contact extending from the bottom of the wafer, through a hole in the substrate and epitaxial layer, to the underside of the source or other electrode which is deposited on the top side of the epitaxial layer. The chip, comprising the substrate, epitaxial layer, and top electrodes, is mounted on a heat sink. The chip's underside, including the bottom surface of the plated through source contact, is conductively bonded to the top surface of the heat sink.

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Palo Alto, CA, United States of America

Masahiro Omori