Nippon Telegraph and Telephone Corporation

Ntt Electronics Corporation

Masahiro Nada

Yuki Yamada

Hideaki Matsuzaki

Fumito Nakajima

Yoshifumi Muramoto

Seigo Ando

Tadao Ishibashi

Haruki Yokoyama

Toshihide Yoshimatsu

Shinji Matsuo

Atsushi Kanda

Yasuhiko Nakanishi

Shoko Tatsumi

Kenji Kurishima

In an optical receiver circuit which suppresses an unnecessary increase in impedance and occurrences of resonance and radiation noise and which produces preferable high-frequency transmission characteristics, a PD submount mounted with a PD chip and a chip capacitor and a TIA carrier mounted with a TIA chip are electrically connected to each other by a bonding wire. The chip includes an anode electrode pad and a cathode electrode pad, anode electrode-side ground pads are formed at positions that sandwich the pad, and cathode electrode-side ground pads are formed at positions that sandwich the pad. A wire electrically connects the pad and a signal pad for input of the chip to each other, a wire electrically connects the pad and the capacitor to each other, and a wire electrically connects the pads and the pads to each other.

Optical receiving circuit

There is provided an element structure of an avalanche photodiode that can operate in a high gain state while having high reliability and low noise property. There is produced an avalanche photodiode including at least a multiplication layer and a light absorbing layer between first and second semiconductor contact layers, in which an area of the first semiconductor contact layer is at least smaller than an area of the multiplication layer, the avalanche photodiode having an electric field relaxation layer configured to be depleted at an operating voltage between the first semiconductor contact layer and the multiplication layer.

Avalanche photodiode

A structure includes an insulating layer on a semiconductor substrate, and a first through-hole and a second through-hole formed in the insulating layer. The second through-hole is formed in the insulating layer at a set distance from the first through-hole. The structure also includes a first electrode portion and a second electrode portion. The first electrode portion is formed by filling the first through-hole. The first electrode portion includes a probing pad on the insulating layer. The probing pad is wider than an opening area of the first through-hole. The second electrode portion is formed by filling the second through-hole. The second electrode portion includes a probing pad on the insulating layer. The probing pad is wider than an opening area of the second through-hole.

Inspection structure and inspection method

Provided is a semiconductor light receiving element which can achieve a high-speed operation without sacrificing light receiving sensitivity while increasing the margin of a manufacturing process. The semiconductor light receiving element according to the present invention is characterized by comprising: a semiconductor layer doped with a first impurity; a semiconductor light absorption layer in which a band gap energy is adjusted to absorb incident light on the semiconductor layer doped with the first impurity; a semiconductor layer on the semiconductor light absorption layer and doped with a second impurity; and a metal electrode contacting side surfaces of the semiconductor layer doped with the second impurity, wherein side surfaces of the metal electrode are surfaces parallel to a growth direction of the semiconductor layer doped with the second impurity.

Semiconductor light receiving element

A first n-type contact layer, a second n-type contact layer, a multiplication layer, an electric field control layer, a light absorbing layer, and a p-type contact layer are layered in this order on a substrate. The second n-type contact layer is formed between the first n-type contact layer and the light absorbing layer, is made to have an area smaller than that of the light absorbing layer in a plan view, and is disposed inside the light absorbing layer in a plan view.

Optical receiving element and manufacturing method therefor

A light-receiving device includes: a plurality of light-receiving elements arranged in a row on a main surface of a substrate and a first reflection surface and a second reflection surface formed on the substrate to extend in the arrangement direction with the row of the plurality of light-receiving elements interposed therebetween. Each of the first reflection surface and the second reflection surface includes an inclined surface forming one flat surface formed from a main surface of the substrate on which each light-receiving element is formed to a back surface side of the substrate.

Photoreceiver and optical receiver having an inclined surface

A light receiving device includes a semiconductor optical amplifier formed on a principal surface of a first substrate. The semiconductor optical amplifier has a first reflection portion that is formed by an end face at one end thereof, the end face being formed to be oblique to the principal surface of the first substrate. The semiconductor optical amplifier also has a second reflection portion that is formed by an end face at the other end thereof, the end face being formed to be oblique to the principal surface of the first substrate. The light receiving device further includes a second substrate having a back surface bonded to a back surface of the first substrate, and a photodiode formed on a principal surface of the second substrate.

Light receiving device and method of manufacturing the same

A substrate, a first n-type contact layer, a buffer layer, a multiplication layer, an electric field control layer, an absorption layer, and a p-type contact layer are provided. An electrically conductive layer is formed in a central portion of the buffer layer. The substrate is made of a semiconductor having thermal conductivity higher than that of InP, such as SiC, and the first n-type contact layer is made of the same semiconductor as that of the substrate but having n-type conductivity. An n electrode is formed over the first n-type contact layer via a second n-type contact layer.

Avalanche photodiode and method for manufacturing same

An n-type semiconductor layer (), a multiplication layer (), an electric field control layer (), a light absorption layer (), and a p-type semiconductor layer () are formed on a growth substrate (), and the p-type semiconductor layer () is adhered on a transfer substrate (). After that, the growth substrate () is removed, and the n-type semiconductor layer () is processed to have an area smaller than that of the multiplication layer ().

Avalanche photodiode and method of manufacturing the same

An optical waveguide integrated light receiving element includes an optical waveguide () arranged on a side of a second contact layer () opposite to a side where a light absorption layer () is arranged, having a waveguide direction parallel to a plane of the light absorption layer (), and optically coupled with the second contact layer (). The second contact layer () has, in a planar view, a size of an area smaller than that of the light absorption layer () and arranged inside the light absorption layer ().

Optical waveguide integrated light receiving element and method of manufacturing the same

To obtain high linearity without sacrificing light-receiving sensitivity and a high speed, an avalanche photodiode includes an avalanche layer () formed on a first light absorption layer (), an n-field control layer () formed on the avalanche layer (), and a second light absorption layer () formed on the field control layer (). If a reverse bias voltage is applied, a donor impurity in the field control layer () ionizes, and a high electric field is induced in the avalanche layer (). The n-type doping amount in the field control layer () is set such that the impurity concentration in the second light absorption layer () sufficiently depletes at the time of reverse bias application.

A light-receiving element () according to the present invention includes a semiconductor layer () including a p-type semiconductor region (), an n-type semiconductor region (), and a multiplication region (), and a p-type light absorption layer () formed on the multiplication region. The p-type semiconductor region and the n-type semiconductor region are formed to sandwich the multiplication region in a planar direction of the semiconductor layer. This allows an easy implementation of a light-receiving element that serves as an avalanche photodiode by a monolithic manufacturing process.

Light-receiving element and optical integrated circuit

An APD is provided with the semi-insulating substrate, a first mesa having a first laminate constitution in which a p-type electrode layer, a p-type light absorbing layer, a light absorbing layer with a low impurity concentration, a band gap inclined layer, a p-type electric field control layer, an avalanche multiplier layer, an n-type electric field control layer, and an electron transit layer with a low impurity concentration are stacked in this order on a surface of the semi-insulating substrate, a second mesa having an outer circumference provided inside an outer circumference of the first mesa as viewed from the laminating direction and having a second laminate constitution in which an n-type electrode buffer layer and an n-type electrode layer are stacked in this order on a surface on the electron transit layer side, and a depletion control region that is provided in layers on the second mesa side relative to the p-type electric field control layer, formed in an encircling portion provided inside an outer circumference of the first mesa and encircling an outer circumference of the second mesa, and prevents the encircling portion of the p-type electric field control layer from being depleted when bias is applied.

An APD is provided with a semi-insulating substrate, a first mesa having a first laminate constitution in which a p-type electrode layer, a p-type light absorbing layer, a light absorbing layer with a low impurity concentration, a band gap inclined layer, a p-type electric field control layer, an avalanche multiplier layer, an n-type electric field control layer, and an electron transit layer with a low impurity concentration are stacked in this order on a surface of the semi-insulating substrate, a second mesa having an outer circumference provided inside an outer circumference of the first mesa as viewed from the laminating direction and having a second laminate constitution in which an n-type electrode buffer layer and an n-type electrode layer are stacked in this order on a surface on the electron transit layer side of the first mesa, and in the APD, a total donor concentration of the n-type electric field control layer is lower than a total acceptor concentration of the p-type electric field control layer in a range of 2&#xd7;10to 1&#xd7;10/cm.

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Tokyo, Japan

Masahiro Nada