Kabushiki Kaisha Toshiba

Toshiba Memory Corporation

Masahiro Miyairi

Hiromitsu Mashita

Taiga Uno

Shimon Maeda

Takashi Sato

Soichi Inoue

Toshiya Kotani

Shigeki Nojima

Kenji Shiraishi

Satoshi Usui

Sachiyo Ito

Suigen Kyoh

Takaki Hashimoto

Ryota Aburada

Ryuji Ogawa

Hirotaka Ichikawa

Shigeru Hasebe

Tetsuaki Matsunawa

Hiroshi Yoshimura

Naoki Sato

Yuto Takeuchi

Kouichi Nakayama

Kazuyuki Hino

Shinichirou Ooki

Syogo Okamoto

According to one embodiment, a mask pattern correction system includes the following configuration. A stress analysis circuitry divides a layout of a circuit pattern formed using a design mask formed in accordance with mask design data into correction regions, and acquires a displacement amount from the regions. A correction value calculation circuitry calculates a displacement correction value from the displacement amount. A correction map generation circuitry generates a correction map based on a correction value difference of the displacement correction values. A mask position correction circuitry allocates the regions to a layout of the circuit pattern, performs displacement correction of a mask pattern on the design mask by the displacement correction values, and creates a correction mask based on the displacement correction.

Mask pattern correction system, and semiconductor device manufacturing method utilizing said correction system

A manufacturing method of a photomask according to the embodiment sets an exposure condition applied when a resist is formed into a three-dimensional target shape by using a photomask including a plurality of light-shielding areas. Subsequently, the method sets a hypothetical target shape obtained by correcting a target shape based on a development characteristic of the resist for the exposure condition. Subsequently, the method creates a pattern of the photomask corresponding to the hypothetical target shape. Subsequently, the method simulates a prediction shape of the resist when the pattern is used. Subsequently, the method calculates a cost function related to an error between the prediction shape and the hypothetical target shape. Subsequently, the method adjusts the pattern based on a result of the calculation of the cost function.

Manufacturing method of photomask and recording medium

One embodiment includes: a step of evaluating an amount of flare occurring through a mask at EUV exposure; a step of providing a dummy mask pattern on the mask based on the evaluated result of the amount of flare; and a step of executing a flare correction and an optical proximity correction on a layout pattern. The layout pattern is provided by the EUV exposure through the mask with the dummy mask pattern.

Pattern generating method, pattern forming method, and pattern generating program

According to a mask verifying method of the embodiment, a difference between an actual dimension of a mask pattern and a simulation dimension is calculated as a computational estimated value. Moreover, a difference between an actual dimension of the mask pattern that is actually measured and a dimension on pattern data is calculated as an actually-measured difference. Then, it is verified whether a mask pattern dimension passes or fails based on the calculated value. When calculating the computational estimated value, a model function, which is set based on each correspondence relationship between an actual dimension and a mask simulation dimension of a test pattern, which includes a plurality of types of pattern ambient environments, to the mask pattern.

Dimension assurance of mask using plurality of types of pattern ambient environment

A graph in which patterns are each regarded as nodes and nodes of patterns adjacent to each other at a first distance are connected with each other by an edge is produced, each of the patterns is classified into two types so that the two patterns corresponding to the nodes at both ends of the edge are types different to each other, a classification result is corrected by grouping the patterns in each node cluster connected by the edge or each node cluster connected via the node by the edge, and by inverting each of types of a pattern belonging to a same group as that of one pattern, out of a pair of patterns that are classified into a same type and that belong to respectively different groups adjacent to each other at a second distance, and a pattern layout diagram is created based on the corrected classification result.

Pattern layout creation method, program product, and semiconductor device manufacturing method

A pattern data creating method according to an embodiment of the present invention comprises: extracting marginal error patterns using a first result obtained by applying process simulation to mask pattern data based on an evaluation target cell pattern, applying the process simulation to mask pattern data based on an evaluation target cell pattern with peripheral environment pattern created by arranging a peripheral environment pattern in the marginal error patterns such that a second result obtained by creating mask pattern data and applying the process simulation to the mask pattern data is more deteriorated than the first result, and correcting the evaluation target cell pattern or the mask pattern data based on the evaluation target cell pattern when there is a fatal error.

Pattern data creating method, pattern data creating program, and semiconductor device manufacturing method

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Kanagawa, Japan

Masahiro Miyairi