Hitachi, Ltd.

Hitachi Tohbu Semiconductor, Ltd.

Renesas Electronics Corporation

Renesas Technology Corp.

Other

Hitachi Haramachi Electronics Co., Ltd.

Renesas Eastern Japan Semiconductor, Inc.

Masahiro Koizumi

Ryoichi Kajiwara

Kazuya Takahashi

Toshiaki Morita

Toshinori Hirashima

Munehisa Kishimoto

Toshiyuki Hata

Hiroshi Sato

Keiichi Ookawa

Shigeru Ishii

Jin Onuki

Akira Tanaka

Ryuichi Saito

Kazuji Yamada

Kazuhiro Suzuki

Nobuya Koike

Yoshihiko Koike

Isao Kobayashi

Yasutoshi Kurihara

Mamoru Sawahata

Takashi Haramaki

Yutaka Higashimura

Tadao Kushima

Shigeki Sekine

Takashi Hosokawa

Hideo Shimizu

Hideya Kokubun

Asao Nishimura

Masateru Suwa

Masayoshi Shinoda

Yasushi Takahashi

Keiso Takeda

Hiroshi Watanabe

Tomojiro Sugimoto

Yukiharu Akiyama

Hitoshi Suzuki

Ryo Hiraga

Yasushi Koubuchi

Susumu Okikawa

Osamu Asai

Tomio Iizuka

Kazutoshi Itou

Yukio Koseki

Takeo Tamamura

Katsumi Suzuki

Akihiko Narisawa

Yasunori Takaku

Isao Araki

Kazuo Hatori

Toshiyuki Takahashi

Toshio Chuma

Yoshio Ohashi

Makoto Nakajima

Toshiak Morita

A semiconductor device featuring a semiconductor chip including a MOSFET and having a first main surface and a second, opposing main surface, a source electrode pad and a gate electrode pad over the first main surface, a drain electrode over the second main surface, a source external terminal and a gate external terminal, each having a first main surface electrically connected to the source electrode pad and gate electrode pad of the chip, respectively, and a drain external terminal having a first main surface and a second, opposing main surface and being electrically connected to the second main surface of the chip, each of the source, gate and drain external terminals having second main surfaces thereof in a same plane, and, in a plan view of the external terminals, the gate external terminal has a portion located between the source and drain external terminals in at least one direction.

Mosfet package

A semiconductor device featuring a semiconductor chip having a first main surface and a second, opposing main surface and including a MOSFET having source and gate electrodes formed on the first main surface and a drain electrode thereof formed on the second main surface, first and second conductive members acting as lead terminals for the source and gate electrodes, respectively, are disposed over the first main surface, each of the first and second conductive members has a part overlapped with the chip in a plan view, a sealing body sealing the chip and parts of the first and second conductive members such that a part of the first conductive member is projected outwardly from a first side surface of the sealing body and parts of the first and second conductive members are projected outwardly from the opposing second side surface of the sealing body in a plan view.

A semiconductor device features a semiconductor chip including a MOSFET, a first electrode of the MOSFET disposed on an obverse surface of the chip, a second, control electrode of the MOSFET disposed on the obverse surface, a third electrode of the MOSFET disposed on a second, opposing surface of the chip, first, second, and third conductive members, each having top surface and opposing bottom surface, the first, second, and third conductive members connecting with the first, second, and third electrodes electrically, respectively, a sealing body having top and bottom surfaces and sealing parts of the first, second, and third conductive members, the first conductive member having first, second, and third contiguous portions, the first portion is positioned over the first electrode, the second is positioned between the first and second portions and the third portion is positioned under the obverse surface of the chip.

Semiconductor device

A semiconductor device features a semiconductor substrate with a MOSFET, an electrode for main current of the MOSFET disposed on a first major surface of the substrate, an electrode for control of the MOSFET disposed on the first major surface, a rear plane electrode of the MOSFET disposed on a second, opposing surface of the substrate, and an external connection terminal electrically connected to the rear plane electrode, the external electrode contains a first part, a second part and a third part, the first part is positioned over the rear plane electrode, the third part is positioned below the second major surface and the third part is connected via the second part to the first part.

MOSFET package

A semiconductor device, wherein a first metallic member is bonded to a first electrode of a semiconductor element via a first metallic body containing a first precious metal, and a second metallic member is bonded to a second electrode via a second metallic body containing a second precious metal.

A semiconductor device in which electrodes of a plurality of semiconductor elements are bonded onto at least one of a plurality of electrode patterns on an insulator substrate, the other surface of the insulator substrate being bonded to a heat dissipating base. The upper surface of the heat dissipating base is covered with a member for cutting off the semiconductor elements from the outer environment. Terminals electrically connect the electrodes on said insulator substrate and the electrode placed outside the cutoff member. The material of the heat dissipating base has a linear expanding coefficient larger than that of the semiconductor element and smaller than three times that of the semiconductor element, and a thermal conductivity larger than 100 W/mK. The semiconductor elements are arranged on at least one electrode surface and in at least two regions divided by the other electrode surface on the insulator substrate.

Circuit board

A semiconductor device includes a semiconductor chip and a printed circuit board. Metal electrodes of the semiconductor chip and the internal connection terminals of the printed circuit board are electrically connected through the metallic joining via precious metal bumps. A melting point of a metal material constituting each of the metallic joining parts is equal to or higher than 275 degrees, and a space defined between the chip and the board is filled with resin (under fill) containing 50 vol % or more inorganic fillers.

Flip chip assembly structure for semiconductor device and method of assembling therefor

In a semiconductor device in which an LSI chip comprising electrodes with a 100 &mgr;m pitch or less and 50 or more pins is mounted directly on an organic substrate, a mounting structure and a manufacturing method thereof are provided excellent in the solder resistant reflow property, temperature cycle reliability and high temperature/high humidity reliability of the semiconductor device. Electrode Au bumps of the chip and an Au film at the uppermost surface of connection terminals of the substrate are directly flip-chip bonded by Au/Au metal bonding and the elongation of the bonded portion of the Au bump is 2 &mgr;m or more. The method of obtaining the bonded structure involves a process of supersonically bonding both of the bonding surfaces within 10 min after sputter cleaning, under the bonding conditions selected from room temperature on the side of the substrate, room temperature to 150&deg; C. on the side of the chip, a bonding load of &frac12;S&times;100 MPa to S&times;180 MPa (S: contact area between bump and chip), a loading mode increasing during bonding, and supersonic application time of 50 to 500 ms.

Semiconductor device and manufacturing method thereof

The fuel injection valve according to the present invention is a fuel injection valve adapted to inject a swirl flow of a high-pressure fuel from an injection port thereof. The injection port includes a fuel inlet portion and a fuel outlet portion. The fuel inlet portion has a cylindrical bore. In the fuel outlet portion, a circumference of an inlet thereof is joined to that of an outlet of the cylindrical bore, and the fuel outlet portion has a cross-sectionally elliptic chamfered part diverging from the inlet thereof to the outlet thereof. A depth of the chamfered part is set &frac14; to 2 times as large as a diameter of the fuel inlet portion.

Fuel injection valve

The semiconductor device includes a semiconductor chip having a first electrode and a second electrode formed on a first main surface and a third electrode formed on a second main surface opposite the first main surface. A first portion of a first lead is placed on the first electrode and a second portion of the first lead is located outside the semiconductor chip. A first portion of a second lead is placed on the second electrode and a second portion of the second lead is located outside the semiconductor chip. A plurality of projecting electrodes are provided between the first portion of the first lead and the first electrode and between the first portion of the second lead and the second electrode to electrically connect them. An insulating sheet is provided between the first portion of the first lead and the first main surface of the semiconductor chip and between the first portion of the second lead and the first main surface of the semiconductor chip. The insulating sheet covers the first main surface of the semiconductor chip in areas other than a region in which the plurality of projecting electrodes are provided.

Method of manufacturing a semiconductor package by attaching a lead frame to a semiconductor chip via projecting electrodes and an insulating sheet of resin material

A semiconductor device in which a plurality of semiconductor elements are bonded onto at least one electrode pattern on an insulator substrate formed a plurality of electrode patterns on the main surface, each of the electrodes of the semiconductor element being electrically connected to the electrode pattern, the other surface of the insulator substrate being bonded to a heat dissipating base, the upper surface of the heat dissipating base being covered with a member for cutting off the semiconductor elements from the outer environment, terminals electrically connecting the electrodes on said insulator substrate and the electrode placed outside the cutoff member being provided, wherein the material of the heat dissipating base has a linear expanding coefficient larger than the linear expansion coefficient of the semiconductor element and smaller than three times of the linear expansion coefficient of the semiconductor element, and a thermal conductivity larger than 100 W/mK, the semiconductor elements being arranged on at least one electrode surface and in at least two regions divided by the other electrode surface on the insulator substrate.

Growing community of inventors

Hitachi, Japan

Masahiro Koizumi