Hitachi, Ltd.

Other

Renesas Technology Corp.

Hitachi Microcomputer System, Ltd.

Hitachi Hokkai Semiconductor Ltd.

Texas Instruments Corporation

Hitachi Ulsi Systems Co., Ltd.

Hitachi Yonezawa Electronics Co., Ltd

Renesas Northern Japan Semiconductor, Inc.

Hitachi Microcomputer

Masahiro Ichitani

Kunihiro Tsubosaki

Akihiro Yaguchi

Kunihiko Nishi

Gen Murakami

Asao Nishimura

Hiroshi Kikuchi

Takashi Yokoyama

Makoto Kitano

Akio Hasebe

Takashi Yamazaki

Hiroshi Hozoji

Kazuyoshi Oshima

Aizo Kaneda

Junichi Saeki

Shozo Nakamura

Isamu Yoshida

Sueo Kawai

Hiroyoshi Kokaku

Noriyuki Kinjo

Masatsugu Ogata

Masanori Segawa

Syuuji Eguchi

Ichiro Anjoh

Ichiro Anjo

Ryo Haruta

Tetsuro Matsumoto

Junichi Arita

Tetsurou Matsumoto

Atsushi Fujisawa

Takafumi Konno

Shingo Ohsaka

Kazunari Suzuki

Takashi Miwa

Akihiko Iwaya

Takanori Hashizume

Noriyuki Takahashi

Masayuki Suzuki

Takafumi Nishita

Kenichi Imura

Kouji Tsuchiya

Takao Matsuura

Katsuyuki Matsumoto

Masamichi Ishihara

Ryosuke Kimoto

Masanori Shibamoto

Michio Tanimoto

Taisei Jin

Shunji Koike

Atsushi Nakamura

Masazumi Amagai

Darvin R Edwards

Naozumi Morino

Mitsuaki Haneda

Ikuo Kudo

Saneaki Tamaki

Yasumi Tsutsumi

Lim T Beng

Masamichi Sato

Chai T Chong

Tomoo Matsuzawa

Rumiko Ichitani, Legal Representative

Kazuhiro Ichitani, Legal Representative

Sachiyo Ichitani, Legal Representative

Tsutomu Kakimoto

Arata Kinjyo

A semiconductor device comprises: a package substrate having a plurality of bonding electrodes arranged in a peripheral region of a main surface thereof and wirings connected to the respective bonding electrodes and electrolessly plated; a semiconductor chip mounted on the package substrate; a plurality of wires connecting pads of the semiconductor chip and the bonding electrodes; a sealing body for sealing the semiconductor chip and the wires with resin; and a plurality of solder balls arranged on the package substrate. The wirings are formed only at the inner side of the plurality of bonding electrodes on the main surface of the package substrate, and no solder resist film is formed at the outer side of the plurality of bonding electrodes. With this arrangement, the region outside the bonding electrodes can be minimized and the semiconductor device can be downsized without changing the size of the chip mounted thereon.

Semiconductor device

A semiconductor device uses a package substrate on which bonding leads are formed respectively corresponding to bonding pads for address and data which are distributed to opposing first and second sides of a memory chip and address terminals and data terminals which are connected to the bonding leads. The semiconductor device further includes an address output circuit and a data input/output circuit which also serves for memory access and a signal processing circuit having a data processing function. A semiconductor chip having bonding pads connected to the bonding leads corresponding to the address terminals of the package substrate and bonding pads connected to the bonding leads corresponding to the data terminals of the package substrate and distributed to two sides out of four sides and the above-mentioned memory chip are mounted on the package substrate in a stacked structure. Bonding leads arranged along at least one side of the substrate may include bonding leads of rectangular configuration having longer sides disposed at acute angles with respect to the side of the substrate.

A semiconductor device uses a package substrate on which bonding leads are formed respectively corresponding to bonding pads for address and data which are distributed to opposing first and second sides of a memory chip and address terminals and data terminals which are connected to the bonding leads. The semiconductor device further includes an address output circuit and a data input/output circuit which also serves for memory access and a signal processing circuit having a data processing function. A semiconductor chip having bonding pads connected to the bonding leads corresponding to the address terminals of the package substrate and bonding pads connected to the bonding leads corresponding to the data terminals of the package substrate and distributed to two sides out of four sides and the above-mentioned memory chip are mounted on the package substrate in a stacked structure.

Stacked large-scale integrated circuit (LSI) semiconductor device with miniaturization and thinning of package

The back side of a strip substrate with plural semiconductor chips mounted thereon is vacuum-chucked to a lower mold half of a mold, and in this state the plural semiconductor chips are sealed with resin simultaneously to form a seal member. Thereafter, the strip substrate and the seal member are released from the mold and are cut into plural semiconductor devices. The semiconductor devices thus obtained are improved in their mounting reliability.

Method of manufacturing a semiconductor device and a semiconductor device

As the semiconductor chip is large-sized, highly integrated and speeded up, it becomes difficult to pack the semiconductor chip together with leads in a package. In view of this difficulty, there has been adopted the package structure called the 'Lead-On-Chip' or 'Chip-On-Lead' structure in which the semiconductor and the leads are stacked and packed. In the package of this structure, according to the present invention, the gap between the leading end portions of the inner leads and the semiconductor chip is made wider than that between the inner lead portions except the leading end portions and the semiconductor chip thereby to reduce the stray capacity, to improve the signal transmission rate and to reduce the electrical noises.

In a method of forming a ball grid array type semiconductor package, a semiconductor chip is mounted through an adhesive material on a surface of a flexible film substrate. Plural bump electrodes are arranged in an array on the opposite side of said substrate and the semiconductor chip is sealed by a resin. In this regard, an insulation layer is formed to cover an electric conductor layer pattern formed on the surface of the substrate, and the semiconductor chip is mounted through an adhesive material on the insulation layer. The insulation layer is divided into a plural number of parts that are mutually discontinuous in the area under the semiconductor chip. By this divided insulation layer, a short circuit between the semiconductor chip and the electric conductor layer pattern is prevented and a deformation of the substrate that comprises the flexible films is suppressed.

Method of manufacturing semiconductor package including forming a resin sealing member

In a ball grid array type semiconductor package, a semiconductor chip is mounted through an adhesive material on a surface of a flexible film substrate. Plural bump electrodes are arranged in an array on the opposite side of said substrate and the semiconductor chip is sealed by a resin. In this regard, an insulation layer is formed to cover an electric conductor layer pattern formed on the surface of the substrate, and the semiconductor chip is mounted through an adhesive material on the insulation layer. The insulation layer is divided into a plural number of parts that are mutually discontinuous in the area under the semiconductor chip. By this divided insulation layer, a short circuit between the semiconductor chip and the electric conductor layer pattern is prevented and a deformation of the substrate that comprises the flexible films is suppressed.

Method of manufacturing a resin encapsulated semiconductor device to provide a vent hole in a base substrate

Method of manufacturing semiconductor device having resin sealing body

Method of manufacturing a semiconductor device using a mold

As the semiconductor chip is large-sized, highly integrated and speeded up, it becomes difficult to pack the semiconductor chip together with leads in a package. In view of this difficulty, there has been adopted the package structure called the &ldquo;Lead-On-Chip&rdquo; or &ldquo;Chip-On-Lead&rdquo; structure in which the semiconductor and the leads are stacked and packed. In the package of this structure, according to the present invention, the gap between the leading end portions of the inner leads and the semiconductor chip is made wider than that between the inner lead portions except the leading end portions and the semiconductor chip thereby to reduce the stray capacity, to improve the signal transmission rate and to reduce the electrical noises.

A semiconductor device in which a semiconductor chip is bonded by a metal bond to one surface of a heat sink formed of a material with a thermal expansion coefficient is close to he semiconductor chip the heat sink is glued to a stiffener with a silicon adhesive with an elastic modulus of 10 MPa or less, a TAB tape is glued to the stiffener with an epoxy adhesive and the semiconductor chip is sealed with an epoxy sealing resin with an elastic modulus of 10 GPa or more for protection from outside.

Semiconductor device and mounting board

Method of manufacturing a semiconductor device using reinforcing patterns for ensuring mechanical strength during manufacture

Ball grid array type semiconductor package having a flexible substrate

Growing community of inventors

Kodaira, Japan

Masahiro Ichitani