Seiko Epson Corporation

Masahiko Tsuchiya

Norio Koizumi

Kota Onishi

Kinya Matsuda

Kensuke Yaita

A semiconductor device includes: a semiconductor substrate of a first conductivity type; a first impurity layer of a second conductivity type formed at a surface of the semiconductor substrate; a second impurity layer of a first conductivity type formed to surround the first impurity layer of the semiconductor substrate; an insulating film configured to cover at least the first impurity layer; a resistive element provided on the insulating film and having a spiral shape; a first interlayer insulating layer configured to cover the resistive element; and a plurality of first conductive films provided on the first interlayer insulating layer and electrically coupled with the resistive element.

Semiconductor device

An integrated circuit includes: an over-discharge detection circuit that is supplied with electric power from a secondary battery, and is configured to detect whether or not the secondary battery is in an over-discharged state, and upon detecting that the secondary battery is in an over-discharged state over a predetermined period, stop a detection operation according to an enable signal; and a power down cancel circuit configured to, when the over-discharge detection circuit has stopped the detection operation, cause the over-discharge detection circuit to re-start the detection operation when a current supplied to a detection terminal from a power feeding circuit is a predetermined current or more.

Mobile information processing device, integrated circuit, and battery pack

An integrated circuit device includes: a segment driver having a plurality of segment signal output circuits for driving a plurality of segment lines; a common driver having a plurality of common signal output circuits for driving a plurality of common lines; and a power supply circuit that supplies a first power supply at a first voltage level, a second power supply at a second voltage level, a third power supply at a third voltage level and a fourth power supply at a fourth voltage level to the segment driver and the common driver, wherein each of the plurality of segment signal output circuits sets a voltage level of a segment signal to the third voltage level in a first transition period from a period in which the voltage level of the segment signal is set to the first voltage level to a period in which the voltage level of the segment signal is set to the fourth voltage level, and sets the voltage level of the segment signal to the second voltage level in a second transition period from a period in which the voltage level of the segment signal is set to the fourth voltage level to a period in which the voltage level of the segment signal is set to the first voltage level.

Integrated circuit device, electro optical device and electronic apparatus

A semiconductor device includes a source circuit and a control circuit. The source circuit includes a plurality of operational amplifiers, a plurality of transmission gates, one end of each of the transmission gates being connected to a corresponding source line, and a buffer circuit that outputs a switch control signal. When the number of transmission gates that are turned ON/OFF using the buffer circuit is referred to as n, a gate width and a gate length of a MOSFET of each of the transmission gates are respectively referred to as Wb and Lb, a gate width and a gate length of a MOSFET of the buffer circuit are respectively referred to as Wa and La, and K indicates a constant, the relationship n&#xd7;Wb&#xd7;Lb&#x2267;K&#xd7;(Wa/La) is satisfied.

Semiconductor device, electro-optical device, and electronic instrument

A power supply circuit which generates driving voltages for an electro-optic device having a plurality of common electrodes and a plurality of segment electrodes with the use of multi-line driving in which four lines of common electrodes are simultaneously selected. The driving voltages are first through seventh driving voltages in which an i-th (2&#x2266;i&#x2266;5, and i is an integer) driving voltage is higher than an (i+1)th driving voltage. The power supply circuit includes: a common electrode driving-voltage generator circuit which generates the first and seventh driving voltages used for selection of the common electrodes at a positive side and a negative side on the basis of the fourth driving voltage; and a segment electrode driving-voltage generator circuit which generates the fourth driving voltage, the second and third driving voltages used for the segment electrodes at the positive side on the basis of the fourth driving voltage, and the fifth and the sixth driving voltages used for the segment electrodes at the negative side on the basis of the fourth driving voltage. The segment electrode driving-voltage generator circuit changes and outputs output potentials of only the third and fifth driving voltages from among the second through sixth driving voltages, while a voltage difference between the third and fourth driving voltages is kept equal to a voltage difference between the fourth and the fifth driving voltages.

Power supply circuit, driving device, electro-optic device, electronic apparatus, and method of supplying driving-voltages

Disclosed are a power supply circuit which can cope with a multipotential level design and is suitable for generating potentials for driving a liquid crystal, and a liquid crystal device and an electronic instrument which use the power supply circuit. A first step-up circuit in the power supply circuit generates a first stepped-up potential level obtained by stepping up a power-supply level with a ground level taken as a reference. A regulator circuit generates a center potential obtained by regulating the first stepped-up potential level by referring to a reference potential level with the ground level taken as a reference. A second step-up circuit generates a second stepped-up potential level obtained by stepping up the center potential with the ground level taken as a reference. A multipotential generating circuit generates a plurality of potential levels from a difference between the second stepped-up potential level and the center potential with the ground level taken as a reference, and supplies those potential levels to the panel of the liquid crystal device that is driven by an MLS driving scheme.

Power supply circuit, operational amplifier circuit, liquid crystal device and electronic instrument

An operational amplifier having a first step-up circuit in the power supply circuit generates a first stepped-up potential level obtained by stepping up a power-supply level with a ground level taken as a reference. A regulator circuit generates a center potential obtained by regulating the first stepped-up potential level by referring to a reference potential level with the ground level taken as a reference. A second step-up circuit generates a second stepped-up potential level obtained by stepping up the center potential with the ground level taken as a reference. A multipotential generating circuit generates a plurality of potential levels from a difference between the second stepped-up potential level and the center potential with the ground level taken as a reference, and supplies those potential levels to the panel of the liquid crystal device that is driven by an MLS driving scheme.

A temperature sensor circuit which includes: an adjustment circuit which generates a first divided voltage obtained by dividing a reference voltage; a current generation circuit which has a transistor element and generates a current corresponding to a gate voltage of the transistor element, the first divided voltage being supplied to a gate terminal of the transistor element; a voltage generation circuit which includes a diode element to which the current is supplied, an analog voltage being generated between both ends of the diode element; and an analog/digital (A/D) conversion circuit which compares a second divided voltage obtained by dividing the reference voltage with the analog voltage and converts the analog voltage into a digital value.

Temperature sensor circuit, semiconductor integrated circuit, and method of adjusting the temperature sensor circuit

A first differential amplifier circuit includes a first P-type transistor and a second P-type transistor which constitute a current mirror circuit, and operates based on an input voltage V . A second differential amplifier circuit includes a first N-type transistor and a second N-type transistor forming a current mirror circuit and operates based on the common input voltage V . A third P-type transistor operable based on a first signal S from the first differential amplifier and a third N-type transistor operable based on a second signal S from the second differential amplifier are provided. A voltage between these third P-type and third N-type transistors becomes an output voltage V . The first differential amplifier circuit has a fourth N-type transistor that is connected in series to the first P-type transistor and a fourth N-type transistor connected in series to the second P-type transistor, wherein a driving ability difference is provided between a pair of transistors forming a first differential pair.

Differential amplifier, semiconductor device, power supply circuit and electronic equipment using the same

A power supply circuit for generating potentials used to drive a liquid crystal, has first to fourth switches ( to ) connected in series between a high potential line ( ) and a low potential line ( ). The first to fourth switches are turned on and off by a switch drive circuit ( ) so that the period of time in which the first and third switches are on and the period of time in which the second and fourth switches are on alternate. The power'supply circuit also has the first to third capacitors ( to ) of which the state of connection is switched alternately between serial and parallel by the switching operation of the switches. The potential between the second and third switches converges the middle potential between the potentials of the high and low potential lines by the alternate switching between series and parallel connections of the third capacitor ( ) to the first and second capacitors ( ).

Liquid-crystal display, electronic device, and power supply circuit for driving liquid-crystal display

A first and second circuits are connected in parallel between a first supply line supplying a first potential and a second supply line supplying a second potential. Each of the first and second circuits has first and second P-type transistors and an N-type transistor connected in series in order from the first-supply-line side. The gate of the first P-type transistor in the first circuit is connected to the drain of the N-type transistor in the second circuit. The gate of the first P-type transistor in the second circuit is connected to the drain of the N-type transistor in the first circuit. Input potentials opposite to each other are applied to the gates of the N-type transistors in the first and second circuits respectively and output potentials level-shifted from the input potentials are output from the drains of the N-type transistors in the first and second circuits respectively. A third supply line supplying a third potential between the first and second potentials is connected to the gate of the second P-type transistor in each of the first and second circuits.

Level shift circuit and semiconductor device using the same

A differential amplifier comprises first and second differential amplifier circuits. The first differential amplifier circuit includes a first N-type transistor and a second N-type transistor for constituting a differential pair, and operates based on a first input voltage V . The second differential amplifier circuit includes a first P-type transistor and a second P-type transistor making up a differential pair, and operates based on a second input voltage V . There is also provided a third P-type transistor operable based on a first signal S coming from the first differential amplifier circuit and a third N-type transistor operable based on a second signal S from the second differential amplifier circuit, wherein a voltage between these third P- and N-type transistors becomes an output voltage V .

A semiconductor device comprises: a first resistor which has a plurality of first connection points to be selectively connected to an input terminal of an amplifier and has both ends to which a voltage is applied; and a second resistor which has one end to be connected to an output terminal of the amplifier and has a plurality of second connection points to be selectively connected to a feedback input terminal of the amplifier. One of the first connection points and one of the second connection points are selected in such a manner that a voltage at the output terminal of the amplifier becomes constant. Each of the first and second resistors is formed of first reference resistors having a first reference length and second reference resistors having a second reference length as many as needed, both of which are connected by an interconnect layer. The first and second reference resistors for forming the first and second resistors are provided in an effective resistor region and are regularly arranged. A dummy resistor region is disposed around the effective resistor region.

A semiconductor device that is capable of preventing erroneous operation such as momentary lighting, comprising a booster circuit to which first and second power supply potentials VDD and VSS are supplied from an external power source, for boosting the absolute value of the potential difference therebetween and charging the boosted potential to a capacitor. This booster circuit has a plurality of transistors and a plurality of capacitors, and the boosted potential is charged to one of the plurality of capacitors in accordance with how the plurality of transistors are turned on or off. The gates of a plurality of transistors are connected to output lines of first and second NAND circuits, to which the output of a comparator is input through a buffer. The output of the comparator is at a low level when the second power supply potential VSS is higher than a reference potential VREG, such as when the power is forcibly cut, in which case the charge in one of the plurality of capacitors is discharged, based on the outputs from the first and second NAND circuits.

Electrical device with booster circuit

A semiconductor device that is capable of preventing erroneous operation such as momentary lighting, having a booster circuit to which first and second power supply potentials VDD and VSS are supplied from an external power source, for boosting the absolute value of the potential difference therebetween and charging the boosted potential to a capacitor. This booster circuit has a plurality of transistors and a plurality of capacitors, and the boosted potential is charged to one of the plurality of capacitors in accordance with how the plurality of transistors are turned on or off. The gates of a plurality of transistors are connected to output lines of first and second NAND circuits, to which the output of a comparator is input through a buffer. The output of the comparator is at a low level when the second power supply potential VSS is higher than a reference potential VREG, such as when the power is forcibly cut, in which case the charge in one of the plurality of capacitors is discharged, based on the outputs from the first and second NAND circuits.

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Suwa, Japan

Masahiko Tsuchiya