Murata Manufacturing Co., Ltd.

Masahiko Kawaguchi

Katsuji Matsuta

Naoki Iida

Kazuyoshi Uchiyama

Toshimi Kaneko

Toshiya Sasaki

Teruhisa Tsuru

Hisatake Okamura

Atsuo Senda

Masahiro Bando

Osamu Kanoh

Keishiro Amaya

Kenichi Ito

Kazuo Dougauchi

Eita Tamezawa

Katsuhiro Misaki

Yukio Sakamoto

Hayami Kudo

Minoru Matsunaga

Kazuhide Kudo

Yasuhiro Nakata

Yoshiyuki Tonami

Yuji Sugiyama

Katsuji Matsuda

Kenichi Itou

An electronic component is configured to include a laminate disposed between first and second magnetic substrates. The laminate is formed by laminating resin insulating layers, a coil pattern, and a lead pattern. The coil pattern is connected to external electrodes disposed on end surfaces of the laminate by using internal electrodes. The electronic component further includes expansion relaxation portions disposed in the inside of the resin insulating layers and located in the vicinity of connection regions of the internal electrodes and the external electrodes. The expansion relaxation portions are formed by using a magnetic powder resin in which a ferrite powder and a resin material are mixed.

Electronic component

A chip inductor is constructed by alternately laminating plural conductor patterns and plural insulating layers on and above a ceramic substrate, and connecting the plural conductor patterns to each other in series in a lamination direction thereof so as to constitute a coil. Specifically, the number of turns of the lowermost conductor pattern disposed directly on the ceramic substrate is larger than the number of turns of the other plural conductor patterns and the number of turns of the other plural conductor patterns are substantially equal to each other. Preferably, the number of turns of the lowermost conductor pattern is about 1.5 times the number of turns of the other plural conductor patterns.

Chip inductor and method for manufacturing the same

A coil component includes a first coil block and a second coil block that are sandwiched between magnetic substrates so as to form a chip body, and external electrodes that are attached to the chip body. The first coil block includes a coil body and an insulating body. The coil body includes an outer coil portion and an inner coil portion. The outer coil portion includes a first pattern group and a second pattern group, which are connected helically vertically in an alternating fashion. The inner coil portion includes a first spiral pattern and a second spiral pattern, which are connected to each other in series. In other words, low stray capacitance is achieved by the outer coil portion, while high inductance is achieved by the inner coil portion.

Coil component

A small size electronic component has a small direct current resistance value of a conductor pattern and minimal dimensional irregularity of a conductor pattern. In order to form such a component, a photosensitive conductive paste applied on a ceramic substrate and is then exposed through a photo mask and developed so as to form a lower conductor pattern layer of a coil conductor pattern. Then an insulating paste is applied on the ceramic substrate so as to cover the lower conductor pattern layer and the insulating paste is removed with a solvent until at least the upper surface of the lower conductor pattern layer is exposed so as to form an inter-line insulating layer. Furthermore, after applying a photosensitive conductive paste as a film, the exposure and development operation is conducted again while using the photo mask so as to form an upper conductor pattern layer on the lower conductor pattern layer.

Method of manufacturing an electronic component including an inter-line insulating layer and a conductor pattern

A common mode choke coil array of a two-element type includes two common mode choke coil elements including at least two spiral coils and arranged side by side in a laminate body (chip member) in plan view. The spiral coils are configured so that the number of turns of the coils on the sides thereof where the coils are adjacent to each other is smaller than the number of turns of the coils on the sides thereof where the coils are distant from each other. The spiral directions of the coils arranged side by side are opposite to each other.

Common mode choke coil array

A directional coupling device includes a main line and a sub line, and line coupling (distributed constant coupling) is effected between the main line and the sub line, each of which has a portion that is arranged substantially parallel to each other and alongside each other. The sub line is longer than the main line. The main line is a substantially straight line or a substantially straight line bending at a predetermined position, i.e., a non-spiraling line, and the sub line is arranged to circle in a spiral manner by bending a substantially straight line at predetermined positions. Thus, a small high-capability directional coupler has excellent isolation properties and directivity, and little insertion loss or deterioration in reflection properties.

Directional coupler

A small directional coupler includes a main line and a subline having a sufficient self-inductance value and achieving a very small insertion loss. A main-line conductor pattern and a subline conductor pattern are formed on the top surface of an insulating substrate by a method using photolithographic technologies. The main-line conductor pattern and the subline conductor pattern are formed in a spiral shape and so as to extend substantially parallel to each other. In order for the self-inductance value of the main line to be lower than the self-inductance value of the subline, the line width of the subline conductor pattern is narrower than the line width of the main-line conductor pattern. More specifically, it is preferable that the line width of the conductor pattern for a subline be about 50% to about 90% of the line width of the main-line conductor pattern.

A spiral coil pattern is formed on a substantially rectangular insulation substrate of an inductor by photolithography. In the coil pattern, the electrode width of a portion of the pattern provided in the vicinity of the right short side of the substrate so as to be substantially parallel to the short side is wider than the electrode width of the other portion of the pattern. The interelectrode spacing of a portion of the pattern is wider than the interelectrode spacing of the other portion of the pattern. When the inductance of the inductor is required to be reduced to make the inductance a desired inductance value, the electrode width of the portion of the coil pattern is made wider in the inner direction of the coil pattern than the original electrode width.

Inductor and method for adjusting the inductance thereof

A coil device includes a first magnetic substrate, a laminated body disposed on the first magnetic substrate and having insulating layers, coil patterns, and at least one through-hole, a magnetic layer covering the upper surface of the laminated body, an adhesive layer disposed on the magnetic layer, and a second magnetic substrate disposed on the adhesive layer and bonded to the magnetic layer via the adhesive layer. The insulating layers defining an insulator and the coil patterns for forming a coil are alternately stacked so that the coil patterns are arranged in the insulator, the through-hole is located at an area where the coils are not located and extends from the upper surface of the laminated body to the first magnetic substrate. The magnetic layer has at least one portion extending through the through-hole to contact the first magnetic substrate. The adhesive layer is nonmagnetic, and the laminated body is sandwiched between the first and second substrates.

Coil device

A variable inductor includes two substantially meandering coils with trimming electrodes disposed therebetween on an insulating substrate. The trimming electrodes are located outside the region where the coils are provided. The two coils and the trimming electrodes are electrically connected. The trimming electrodes are exposed to a laser beam and thus, are trimmed one by one so as to vary the inductance.

Variable inductor and method

In a three-terminal variable inductor, a pair of spiral coil electrodes and a plurality of trimming electrodes are disposed on an insulative substrate. The trimming electrodes are arranged so as to bridge the respective outer portions of the spiral coil electrodes without crossing any of the spiral coil electrodes, thus electrically connecting the spiral coil electrodes. Laser beams are irradiated onto the trimming electrodes, so that a groove is formed so as to cut the trimming electrodes one by one, whereby inductance is changed as desired.

Three-terminal variable inductor and method of making the same

A variable inductor includes an input external electrode, an output external electrode, and a coil formed by electrically connecting at least two spiral coil pattern portions in series between the input external electrode and the output external electrode. At least one trimming electrode is further provided in each of the spiral coil pattern portions. A first end and a second end of each trimming electrode are connected to the spiral coil pattern portion, and a lead out electrode, respectively, so that the trimming electrode bridges between the lead out electrode and the coil. The trimming electrodes are sequentially trimmed one-by-one, by, for example, irradiating a laser beam, starting from a trimming electrode closer to an edge, whereby the inductance of the coil is increased accordingly.

Variable inductor

A small size electronic component has a small direct current resistance value of conductor pattern and minimal dimensional irregularity of a conductor pattern. In order to form such a component, a photosensitive conductive paste applied on a ceramic substrate and is then exposed through a photo mask and developed so as to form a lower conductor pattern layer of a coil conductor pattern. Then an insulating paste is applied on the ceramic substrate so as to cover the lower conductor pattern layer and the insulating paste is removed with a solvent until at least the upper surface of the lower conductor pattern layer is exposed so as to form an inter-line insulating layer. Furthermore, after applying a photosensitive conductive paste as a film, the exposure and development operation is conducted again while using the photo mask so as to form an upper conductor pattern layer on the lower conductor pattern layer.

Growing community of inventors

Takefu, Japan

Masahiko Kawaguchi