Texas Instruments Corporation

Texas Instruments Japan Limited

Masahiko Higashi

Frank Alexander Baiocchi

Haian Lin

Namiko Hagane

Tatsumi Satoh

Tsuyoshi Chimura

A device includes an epitaxial layer located over a semiconductor substrate, the epitaxial layer and the substrate both having a first conductivity type. A field-effect transistor (FET) includes source and drain regions having an opposite second conductivity type disposed in the epitaxial layer, and a gate structure over the substrate and between the source and drain regions. A diode includes first and second p-type regions and an n-type region all disposed in the epitaxial layer, the n-type region touching the first p-type region. A conductive plug electrically connects the first p-type region to the source region via the substrate.

Source down power FET with integrated temperature sensor

An electronic device includes a first semiconductor die with a first FET having a drain connected to a switching node, a source connected to a reference node, and a gate connected to a first switch control node. The first die also includes a diode-connected bipolar transistor that forms a temperature diode next to the first FET. The temperature diode includes a cathode connected to the reference node, and an anode connected to a bias node. The electronic device also includes a second semiconductor die with a second FET, and a package structure that encloses the first and second semiconductor dies.

An operational amplifier with improved operational speed, as well as low power consumption, arranges a current mirror made of the pMOS transistors PT.sub.17 and PT.sub.18 in the stage after the initial-stage differential amplifier, supplies the output of the initial-stage differential amplifier to the gate of the nMOS transistor NT.sub.14, supplies the current flowing through the current mirror to the output stage side by a current mirror made of the pMOS transistors PT.sub.15 and PT.sub.16, and lastly a pMOS transistor PT.sub.19 is connected as a constant-current source between the supply line for the power supply voltage V.sub.DD and the node ND.sub.12, and makes the idling current I.sub.19 flow in the node ND.sub.12. Due to this, stabilization of DC operations during normal states and when shifting its states can be designed without considering the characteristics in the vicinity of the threshold voltage of pMOS transistor PT.sub.16, and thus stringent controls in the manufacturing process and the like are unnecessary.

Operational amplifier with stabilized DC operations

A drive circuit in which the rise and fall characteristics with multiple voltages are made the same, while maintaining a high breakdown voltage. Drive circuit 70, which supplies power supply voltages VH and VL and voltage VM intermediate between them to output pad 32, is composed of p-channel MOS transistor P5 and n-channel MOS transistors N5, N6 and N7. When the output voltage changes from VH to VM, both transistors N6 and N7 conduct, and when the output voltage changes from VL to VM, only transistor N6 conducts. The transistors that supply intermediate voltage VM are constructed of transistors of the same conductivity type, so that the rise and fall characteristics to VM can be made the same while the breakdown voltage of the transistors in the circuit that supplies this intermediate voltage VM is kept high.

Growing community of inventors

Amimachi, Japan

Masahiko Higashi