Kabushiki Kaisha Toshiba

Masaharu Seto

Hirokazu Ezawa

According to an embodiment of the present invention, a method of manufacturing a semiconductor device, comprising forming a conducting layer on a substrate; forming a resist mask having an opening in a prescribed position on the conducting layer; forming a first plated film in the opening by supplying an electric current to the conducting layer; increasing the interval between an inner side surface of the resist mask forming the opening and the first plated film by setting back the inner side surface; and forming a second plated film in the opening resulting from the setback of the inner side surface to cover the first plated film by supplying an electric current to the conducting layer.

Method of manufacturing semiconductor device and semiconductor device

There is provided a semiconductor device including a semiconductor chip which includes a semiconductor substrate and a multilayer interconnection structure formed thereon, the multilayer interconnection structure including an interlayer insulating film smaller in relative dielectric constant than an SiOfilm, an encapsulating resin layer which covers a major surface of the semiconductor chip on a side of the multilayer interconnection structure and covers a side surface of the semiconductor chip, and a stress relaxing resin layer which is interposed between the semiconductor chip and the encapsulating resin layer, covers at least a part of an edge of the semiconductor chip on the side of the multilayer interconnection structure, and is smaller in Young's modulus than the encapsulating resin layer.

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Yokohama, Japan

Masaharu Seto