Fuji Electric Co., Ltd.

Fuji Electric Corporate Research and Developement Ltd.

Sumitomo Metal Ceramics Inc.

Fuji Electric Corporate Res. & Dev. Ltd.

Fuji Electric Corporate Research and Devel., Ltd.

Fuji Electric Corporate Research and Dev. Inc.

Masaharu Nishiura

Tatsuhiko Fujihira

Katsumi Yamada

Yoshiyuki Uchida

Hiromu Haruki

Masahito Otsuki

Tadashi Miyasaka

Akira Morozumi

Noriho Terasawa

Akira Nishiura

Masakazu Ueno

Shigemasa Saito

Hakubun Fujisawa

Ken'ya Sakurai

Hiroshi Sakai

Kenya Sakurai

Tomoyuki Kawashima

Toshiaki Kato

Tomio Shimizu

Masahide Miyagi

Toshio Nozaki

Toshio Hama

Takeshige Ichimura

Seigo Oiwa

Michinari Kamiyama

Shizuyasu Yosida

Katumi Yamada

Hiroshi Miyama

Kazuya Matuura

Kazuhiko Teramura

Osamu Nabeta

Toshiaki Katou

Shinichiro Nagakusa

A Ceramic Bonding Copper (CBC) substrate used in semiconductor modules includes a ceramic plate having foil-shaped copper plates bonded to the ceramic plate by the direct copper bonding method. A circuit pattern is formed on one of the copper plates. The ceramic plate is fabricated by sintering at high temperature an alumina powder compact containing zirconia and one or more of the following additives: yttria, calcia, magnesia, and ceria. The flexural strength and the thermal conductivity of the alumnina ceramic plate of the invention are remarkably improved, facilitating a reduction in the thickness of the ceramic plate. The reduction in thickness of the CBC substrate further improves the ability of the semiconductor device to radiate heat and therefore increases the current carrying capability of the semiconductor device.

Insulation substrate for a semiconductor device

A ceramic substrate is a high-temperature fired body consisting of alumina as the main component, zirconia, and a ceramics sintering assisting agent. The assisting agent is one of yttria, calcia, magnesia, and ceria, in which yttria is added at 0.1-2 wt %, calcia is added at 0.02-0.5 wt %, magnesia is added at 0.02-0.4 wt %, and ceria is added at 0.02-0.5 wt %.

Zirconia-added alumina substrate with direct bonding of copper

In a high-withstand-voltage integrated circuit, several circuits are included at different potentials. Each circuit of a different potential has a power source, and interface circuits mediate signals between the circuits of different potentials. By this design, the required number of high-withstand-voltage elements is reduced, and a low-cost, high-withstand-voltage IC with high integration density, surge tolerance and stability is obtained.

High-withstand-voltage integrated circuit for driving a power

A control device for controlling a double gate semiconductor device having a second gate electrode for controlling transition from a thyristor operation to a transistor operation, and a first gate electrode for controlling transition from transistor operation to an ON/OFF operation, and for controlling a current passing from a collector electrode to an emitter electrode, includes a first gate control circuit for delaying a turn-off signal to the double gate semiconductor device and applying the turn-off signal to the first gate electrode.

Control device of semiconductor power device

A semiconductor device thyristor structure includes a first conductive type collector region, second conductive type and first conductive type base regions, and a second conductive type emitter region. First conductive type regions and second conductive type regions have respective first and second type majority carriers. A first MOSFET injects the second type majority carriers into the second conductive type base region. A second MOSFET is opened and closed independent of the first MOSFET and extracts the first type majority carriers from the first conductive type base region. A third MOSFET has a first gate electrode which is also a gate electrode of the first MOSFET, for extracting the first type majority carriers from the first conductive type base region. First conductive type and second conductive type emitter regions are formed within the first conductive type base region and an emitter voltage can be simultaneously applied to these emitter regions. The first conductive type emitter region is formed within the second conductive type emitter region. A second gate electrode of the second MOSFET is formed on the surface of the first conductive type emitter region, the second conductive type emitter region and the first conductive type base region through a gate insulating film. The first gate electrode of the first and third MOSFET is formed on the surface of the first conductive type emitter region, the second conductive type emitter region, the first conductive type base region and the second conductive type base region through a gate insulating film.

Double gate semiconductor device and control device thereof

High-withstand-voltage integrated circuit

An arrangement for detecting overheating of a power integrated circuit includes a power device integrated in a semiconductor substrate and an overheating detection circuit. The overheating detection circuit includes a reverse biased pn junction formed in the same semiconductor substrate as the power device and having a reverse leakage current flow which is temperature dependent, and a voltage converter formed in the same semiconductor substrate as the power device and coupled to the pn junction for producing a voltage depending on the reverse leakage current flow. A threshold circuit is connected for receiving the voltage and producing a signal when the voltage exceeds a threshold voltage to indicate that the power device is overheated.

Overheating detection circuit for detecting overheating of a power device

An arrangement for detecting overheating of a power integrated circuit includes a power device integrated in a semiconductor substrate and an overheating detection circuit. The overheating detection circuit includes a reverse biased pn junction formed in the same semiconductor substrate as the power device and having a reverse leakage current flow which is temperature dependent, and a voltage convertor formed in the same semiconductor substrate as the power device and coupled to the pn junction for producing a voltage depending on the reverse leakage current flow. A threshold circuit is connected for receiving the voltage and producing a signal when the voltage exceeds a threshold voltage to indicate that the power device is overheated.

A circuit for driving a MOS-type semiconductor device having a source, a gate, and a drain. The circuit includes a MOSFET including a source, a gate, and a drain which is connected through a control circuit to the gate of the MOS-type semiconductor device to be driven, a Zener diode, a diode connected to the Zener diode in reverse series between the gate and the drain of the MOSFET, and a resistor connected between the gate and the source of the MOSFET.

MOS-type semiconductor device drive circuit

A MOS type semiconductor device including capacitors connected in series between the source electrode and the peripheral electrode. Alternately, a MOS type semiconductor device including constant voltage diodes connected in series between the source electrode and the peripheral electrode.

Semiconductor device

The present invention pertains to a thin film solar cell array that has an increased durability to high temperatures and high humidity. The thin film solar cell includes a transparent insulating substrate on which unit cells are placed in series. The rear electrodes of the unit cells are made of paste material containing conductive particles which may be applied by printing and baking at about 150.degree. C. Further, the present invention achieves low contact resistance to the a-Si layer.

Method of making thin film solar cell array

The present invention relates to a method of producing a metal-oxide semiconductor device with improved capacity for preventing an actuation of a parasitic bipolar transistor. In the present invention, a metal-oxide seminconductor device is produced through a process in which a single conductive semiconductor region with low-impurity density, on top of which region a gate electrode is provided via a gate-insulating film, consists of two sub-layers with different specific resistance. The upper sub-layer of the region has a significantly lower specific resistance than the lower sub-layer of the region. When a lifetime-reducing agent for reducing the reverse-recovery time of a built-in diode is diffused into the single conductive semiconductor region with low-impurity density, the lifetime-reducing agent concentrates in the upper sub-layer of the region, thereby increasing the specific resistance of the upper sub-layer. Because the specific resistance of the upper sub-layer is initially low, however, the increase in the specific resistance is compensated, and the on-resistance at the time of conduction of the metal-oxide semiconductor device does not increase as a whole. Consequently, the reverse-recovery time of the built-in diode is reduced without an overall increase in the on-resistance, thereby preventing an actuation of the parasitic bipolar transistor without additional power loss.

Method of producing a metal-oxide semiconductor device

The present invention pertains to a thin film solar cell array that has an increased durability to high temperatures and high humidity. The thin film solar cell includes a transparent insulating substrate on which unit cells are placed in series. The rear electrodes of the unit cells are made of a paste material containing conductive particles and baked at about 150.degree. C. Further, the present invention achieves low contact resistance to the a-Si layer.

Thin film solar cell array

A solar cell module and method of manufacture in which the cell has a transparent substrate, an overlying transparent electrode, a layer of amorphous silicon and a metal electrode. Adjacent cells are connected in series by using a laser to divide the transparent electrode into strips and similarly dividing the metal electrode into overlying strips to define gaps between adjacent strips, with the layer of amorphous silicon lying across the gaps. That overlying portion is then crystallized by a laser beam so as to form a connection between the transparent electrode of one strip and the metal electrode of an adjacent strip.

Solar cell module and method of manufacture

An improved linear image sensor of the type having a plurality of linearly arranged photodetecting resistors of amorphous silicon film, leader electrodes individually connected thereto, striped matrix electrodes, and an insulating layer covering the striped matrix electrodes is provided. Each of said leader electrodes are in contact with each of said striped matrix electrodes via a hole formed by patterning in the insulating layer. The insulating layer is made up of a plurality of insulation films laminated one over another by repeating the steps of film forming and patterning. Thus, even though pinholes occur during deposition or patterning of individual layers, there is only a small probability that two or more pinholes will occur at the same place. The risk of short circuits caused by pinholes is therefore substantially reduced.

Growing community of inventors

Kanagawa, Japan

Masaharu Nishiura