Iwatsu Electric Company Ltd.

Iwatsu Electric Clock Co., Ltd.

Masaharu Kamigaki

Yoshihiro Kawata

Toshimichi Shimatani

Koichi Sekiguchi

Masayuki Kawashima

Seiya Uchida

Nobuyasu Shiga

Hideharu Omori

Masataka Kawamura

Hironobu Oshikata

Hideharu Ohmori

A key telephone system for use in PCM telecommunications includes an office line communication units, an extension interface unit, a receiving unit, an extension communication unit, and an information transmitting and receiving unit. The system further includes a timing setting unit for setting the timings for transmitting and receiving information from and to each of the office line communication unit, the extension interface unit, the receiving unit, the extension communication unit, and the information transmitting and receiving unit in which downstream information, which is applied from the extension interface unit to a plurality of terminal units, contains a start bit, bits expressive of data information, and bits expressive of parity information in each of a plurality of frames, contains bits expressive of control information in at least one of the frames, and contains frame-synchronization information for achieving the synchronization of frames in at least one of the frames, and upstream information, which is applied from the terminal units to the receiving unit, contains the bits expressive of the data information, the bits expressive of the parity information, and the bits expressive of the control information, and one of the downstream and upstream information is sent in the former half of each of the frames, and the other thereof is sent in the latter half thereof.

Key telephone system

There is disclosed a data circuit-terminating equipment (DCE) which connects a start-stop synchronous data terminal equipment (DTE) which is not synchronized with a PCM transmission line having various speeds. Further the DCE can satisfy recommendations of the V25 bis of CCITT. The DCE includes a start-stop synchronizing circuit to deliver a sampled request-to-send signal RS, a sampled send data and to transmit a clear-to-send signal CS to the DTE, a PLL obtaining a clock from the line, a timing generator generating timings for circuits, a mapping circuit mapping to make the sampled send data match into the line speed, a sending register converting transmission speed of the mapping circuit output to send to the line at the instructed period, a receiving register receiving data from the line to deliver data with the required speed during the required period for the DTE, and a demapping circuit receiving the receiving register output to demap and send to the DTE. In the DCE satisfying the recommendations, the demapping circuit ANDs a clear-to-send signal and bits indicating the synchronized state to send the clear-to-send signal, and a short line shorting the clear-to-send signal and a carrier detect signal is employed.

Data circuit-terminating equipment

A noise removing circuit is disclosed for removing noise of a duration shorter than a predetermined period of time from an input signal. A monitor circuit is provided for monitoring the input signal to detect whether each time interval occuring between a change detected and a just succeeding change in the input signal is longer or shorter than the predetermined period of time. An output signal is delivered from a one-bit memory. A selector is provided for selectively applying the input signal or the output signal to the one-bit memory in dependent upon whether the time interval between the changes in the input signal is longer or shorter than the predetermined period of time, so that noise of the duration shorter than the predetermined period of time is not included in the output signal.

Noise removing circuit

A conference system, in which a buffer memory is connected to the input-output of each highway for storing all its channel data for each frame. The stored data is time-divided so that a time-length obtained by dividing one frame length by an appropriate number (for example, eight) may be the operation time length of each trunk, thereby implementing real-time processing a number of trunks. Conference circuits capable of inhibiting an output for each channel are connected in parallel to the highways. During an ordinary two-party communication operation an output on the corresponding channel of the conference circuit is inhibited, and during a conference operation an output on the corresponding channel of the highway switching circuit is inhibited, by which channels allocated to telephone sets or CO lines are used for the conference without the necessity of providing channels specifically therefor.

Conference system

A telephone or like telecommunications network is disclosed which has n input highways and m output highways, where n is not less than m, each for the time division multiplex transmission of k channels of data. For selective data transfer between any selected channel of any selected input highway and any selected channel of any selected output highway, a digital, time division switching system is provided which comprises n data memories corresponding respectively to the n input highways, each data memory having k addresses corresponding respectively to the k channels of the corresponding input highway. A control circuit having a control memory causes the data from the input highways to be written sequentially into the data memories and for reading the data memories n times during a preassigned transmission period of each channel on the input and output highways. The data that have been read out from the data memories are gated to pass only the data that have been recovered from that address which corresponds to the selected channel, of that data memory which corresponds to the selected input highway, to the desired channel of the desired output highway.

Growing community of inventors

Tokyo, Japan

Masaharu Kamigaki