Kabushiki Kaisha Toshiba

Sony Corporation

Ricoh Company, Ltd.

Masafumi Takahashi

Yuhki Mitsufuji

Yasuo Yamada

Yu Maeno

Masayuki Nishiguchi

Shiro Suzuki

Takashi Ando

Atsushi Izumihara

Koyuru Okimoto

Tetsuya Ogata

Keiichi Osako

Goro Shiraishi

Tsuyoshi Nishikawa

Tsutomu Takei

Naoyuki Yamashita

Yukara Ikemiya

Kenji Ohmori

Yoshiro Tsuboi

Katsuhisa Kondo

The present technology relates to a signal processing apparatus and method, and a program that can easily make a leaking sound difficult to hear. A signal processing apparatus includes a masking sound generation unit that, in a case where a first content is reproduced in a first region and a second content is reproduced in a second region by wave field synthesis using a speaker array, generates a masking sound for masking a sound of the first content and a sound of the second content heard in a region between the first region and the second region. The present technology can be applied to content reproduction systems.

Signal processing apparatus and method, and program

Provided is a sound field forming apparatus and method to improve reproducibility of a wave front by using a smaller amount of computation. The sound field forming apparatus includes a listener position acquisition section that acquires listener positional information indicating a position of a listener, a drive speaker selection section that selects one or a plurality of speakers, as a drive speaker, used to form a sound field, among the speakers configuring a speaker array on the basis of the listener positional information, and a drive signal generation section that drives the drive speaker and generates a speaker drive signal for forming the sound field in accordance with a selection result of the drive speaker.

Sound field forming apparatus and method

Provided are a sound field forming apparatus and a method that enhances the reproducibility of a wavefront at a listener position. The sound field forming apparatus has a position acquisition unit to acquire position information indicative of a position of a listener or a position of a sound source to be formed, a control point specification unit to specify a control point with a distance from a speaker array of the listener or the sound source on the basis of the position information, and a filter unit to generate a speaker drive signal for forming a predetermined sound field by the speaker array by convoluting a filter coefficient corresponding to the specified control point with a sound source signal.

An information processing apparatus includes a processor that controls display of a graphic including a single shape, where the single shape corresponds to a plurality of content output characteristic adjusting parameters. The processor also modifies the single shape included in the graphic displayed on the display based on input information, and adjusts at least one content output characteristic adjusting parameter of reproduced content based on the input information.

Sound effect adjusting apparatus, method, and program

The present technology relates to a signal processing device, a signal processing method, and a program that can provide sound with more increase in realistic sense by restoring a difference of sound pressure between sound sources. The signal processing device includes: an acoustic signal obtaining unit that obtains an acoustic signal; a sound source positional information obtaining unit that obtains sound source positional information relating to a distance between a sound source and a sound collecting unit that collects sound from the sound source; a listening positional information obtaining unit that obtains listening positional information relating to a distance between a reproducing device that reproduces the acoustic signal and a listener who listens to sound reproduced by the reproducing device; and a correcting unit that corrects gain of the acoustic signal on a basis of the sound-source positional information and the listening positional information. The present technology can be applied to, e.g., a TV telephone system.

Signal processing device, signal processing method, and program

A temperature control device includes a first light source unit; a second light source unit, a temperature control effort for which is different from a temperature control effort for the first light source unit; a heat exchanger plate in contact with the first light source unit and the second light source unit; a single temperature control element configured to control temperature of the first light source unit and temperature of the second light source unit via the heat exchanger plate; and a thermal resistance adjustment part configured to adjust at least one of a value of a thermal resistance between the temperature control element and the first light source unit and a value of a thermal resistance between the temperature control element and the second light source unit.

Temperature control device, image display apparatus and vehicle

A heat dissipating component includes a plurality of heat absorbers each provided for a corresponding one of a plurality of electronic components and to absorb heat from the corresponding one of the plurality of electronic components, and a heat dissipator thermally connected to the plurality of heat absorbers and to dissipate the heat absorbed by the plurality of heat absorbers. The heat dissipating component may be incorporated in an electronic device.

Heat dissipating component and electronic device

Provided in an image pickup apparatus are an imaging optical system (), an image pickup element (), a fixed member () whose position relative to the imaging optical axis OA is fixed, a plurality of movable supporting balls (), each movably supported with attraction of magnetic force, a movable member () in which the image pickup element is provided and which is movably supported by the fixed member with magnetic force through each movable supporting ball (), a driving mechanism () to generate driving force to relatively move the movable member with respect to the fixed member, a display unit (), a mounting plate to mount the display unit in the casing (), wherein the mounting plate () is provided with a protruding arm portion () protruding toward the movable member.

Image pickup apparatus

A bitstream analysis circuit, generates a reference clock control data. A reference clock DPLL receives a system clock signal and reference clock control data from the analysis circuit and generates a reference clock signal. The reference clock DPLL comprises a 1/n frequency dividing circuit for frequency-dividing the system clock signal, and a 1/(n+1) frequency dividing circuit for frequency-dividing the system clock signal. A register stores data to set frequency dividing ratios of both frequency dividing circuits. A mixing ratio set register stores data to set a mixing ratio between output clock signals from both frequency dividing circuits and a mixing circuit, and mixes the output clock signals from both frequency dividing circuits at a mixing ratio in response to the data in the mixing ratio setting register.

Wireless receiver

A logic circuit having a self-test function includes a plurality of F/Fs having at least first-, second- and last-stage scanning F/Fs, each having a clock input, a scanning input and a scanning output terminals. The scanning F/Fs are connected one another so as to supply a scanning clock signal to the clock input terminal of each scanning F/F and a signal from the scanning output terminal of the first-stage to the scanning input terminal of the second-stage for sequential logical operations. Also provided in the logic circuit are a data selector to select either an external scanning signal or a signal output from the scanning output terminal of the last-stage and fed back through a feed-back signal line and a scanning controller to supply a control signal to the data selector so as to supply the signal fed back from the last-stage to the scanning input terminal of the first-stage, thus controlling each F/F in an internal scanning mode. The signal from the last-stage is supplied from the logic circuit via an external scanning output terminal.

Logic circuitry having self-test function

A control section sets a value &ldquo;1&rdquo; to a first flip-flop when a core executes a halt instruction. An OR circuit halts to output the clock. When the detection section detects an occurrence of the exception request, the control section copies the value &ldquo;1&rdquo; of the first flip-flop to a second flip-flop and then sets the value &ldquo;0&rdquo; to the first flip-flop to restart the supply of the clock to the core through the circuit. When detecting that the value &ldquo;1&rdquo; is set in the second flip-flop, the core judges that the state of the core was in the halt state when the exception request occurred, the core returns to the halt state after the completion of the exception handling by executing the halt instruction. When the second flip-flop does not store the value &ldquo;1&rdquo;, the core executes an instruction next to the address of the halt instruction.

Microprocessor including memory for storing set value used to select and executive instruction after completing exception handling caused by exception request

An instruction cache memory ( ) includes a clock gate circuit ( ) for controlling the supply of a clock signal (CLK) to tag RAM ( ). The clock gate circuit ( ) supplies the clock signal (CLK) to tag RAM only when there is a movement in cache line for storing a word to be read out or a branch instruction is detected in a processor ( ). As a result, power consumption of the tag RAM ( ) can be reduced.

Instruction cache memory includes a clock gate circuit for selectively supplying a clock signal to tag RAM to reduce power consumption

A DMA controller having a highly-functional, widely applicable construction, which enables data transfer of a more complicated data region in a single transfer operation, includes an address-continuous transfer end determining portion which determines the end of current data transfer in a region where addresses of data to be transferred are continuous (address-continuous region) contained in an address-continuous region of data to be transferred, and outputs an address-continuous region transfer end signal; an address generating portion which renews and outputs addresses contained in the address-continuous region for transferring data therefrom sequentially from the leading address, and successively effects similar renewal and output of addresses for a plurality of address-continuous regions in response to the address-continuous region transfer end signal; and a data transfer end deciding portion which determines the end of data transfer of a final address-continuous region among all address-continuous regions contained in an address region of data to be transferred, and outputs a data transfer end signal.

DMA controller adapted for transferring data in two-dimensional mapped address space

A motion vector estimating system prepares a predetermined range of a frame/field of image data as a macro block, selects a plurality of proposed motion vectors in the reference region, calculates a signal-strength difference between pixels corresponding to each of the proposed motion vectors of current and reference images. The system comprises: an accumulating element for deriving an accumulation result in parallel on the basis of the signal-strength difference by means of accumulating circuits connected in parallel as a pipeline; an accumulation stopping element having separate stop circuits for separately stopping the accumulation of the accumulating element every n accumulating circuits; and a control element for controlling the supply of the current image data and the reference image data for proposed motion vectors for each of the accumulating circuits, and for outputting a separate stop signal to the accumulation stopping element for stopping the accumulation for the proposed motion vector of the accumulating circuits immediately after the accumulated value of the absolute values of the differences between the signal values of picture elements of the current image and the reference image exceeds a predetermined value. Thus, it is possible to suitably omit unnecessary accumulation in a pipeline processing for estimating a motion vector, so that it is possible to increase the processing speed and to decrease the electric power consumption.

System and method for estimating motion vector in macro block

In a cache memory of a set associative type, a cache-miss rate measuring circuit 140 measures the cache-miss rate during way access operation, the way number control circuit 150 determines the number of ways to be accessed based on a change of the measured cache-miss rate and transfers the determined information about the ways to be accessed to the power control circuit 160. The cache memory controls as follows: When the cache-miss rate is decreased under the condition that the number of ways is reduced, the number of ways to be accessed is changed to the original number of ways and when the cache-miss rates before and after switching of the number of ways are not changed, the number of ways to be accessed is decreased, and power consumption reduced.

Growing community of inventors

Kanagawa, Japan

Masafumi Takahashi